sched_ext: Add scx_cmask_test() and scx_cmask_for_each_cid()

Add single-bit test and iterator over set cids in an scx_cmask.

v2: Bound scx_cmask_for_each_cid() to the active span. (sashiko AI)

Signed-off-by: Tejun Heo <tj@kernel.org>
Reviewed-by: Andrea Righi <arighi@nvidia.com>
This commit is contained in:
Tejun Heo
2026-06-03 15:46:56 -10:00
parent a83f9edf7a
commit 5839c07e89
+43
View File
@@ -225,4 +225,47 @@ static inline void __scx_cmask_set(u32 cid, struct scx_cmask *m)
*__scx_cmask_word(cid, m) |= BIT_U64(cid & 63);
}
/**
* scx_cmask_test - test whether @cid is set in @m
* @cid: cid to test
* @m: cmask to test
*
* Return %false if @cid is outside @m's active range. Otherwise return the
* bit's value. Read via READ_ONCE so callers can race set/clear writers.
*/
static inline bool scx_cmask_test(u32 cid, const struct scx_cmask *m)
{
if (!__scx_cmask_contains(cid, m))
return false;
return READ_ONCE(*__scx_cmask_word(cid, m)) & BIT_U64(cid & 63);
}
/*
* Words of bits[] the active range spans, 0 if empty. Tighter than the storage
* SCX_CMASK_NR_WORDS() sizes for the worst-case base alignment.
*/
static inline u32 scx_cmask_nr_used_words(const struct scx_cmask *m)
{
if (!m->nr_cids)
return 0;
return ((m->base & 63) + m->nr_cids - 1) / 64 + 1;
}
/**
* scx_cmask_for_each_cid - iterate set cids in @m
* @cid: s32 loop var that receives each set cid in turn
* @m: cmask to iterate
*
* Visits set bits within @m's active range in ascending order. Scans only the
* words the active range spans, where head and tail padding is kept zero, so
* no per-cid range check is needed.
*/
#define scx_cmask_for_each_cid(cid, m) \
for (u64 __bs = (m)->base & ~63u, __wi = 0, \
__nw = scx_cmask_nr_used_words(m); \
__wi < __nw; __wi++) \
for (u64 __w = READ_ONCE((m)->bits[__wi]); \
__w && ((cid) = __bs + __wi * 64 + __ffs64(__w), true); \
__w &= __w - 1)
#endif /* _KERNEL_SCHED_EXT_CID_H */