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pinctrl: artpec6: dt: add missing pin group uart5nocts

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Add missing pin group uart5nocts (all pins except cts), which has been
supported by the artpec6 pinctrl driver since its initial submission.

Fixes: 00df0582ea ("pinctrl: Add pincontrol driver for ARTPEC-6 SoC")
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Niklas Cassel
2018-02-22 16:22:46 +01:00
committed by Linus Walleij
parent 41e009b2b5
commit 7e065fb9cc
1 changed files with 3 additions and 2 deletions
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Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
+3 -2
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@@ -20,7 +20,8 @@ Required subnode-properties:
gpio: cpuclkoutgrp0, udlclkoutgrp0, i2c1grp0, i2c2grp0,
i2c3grp0, i2s0grp0, i2s1grp0, i2srefclkgrp0, spi0grp0,
spi1grp0, pciedebuggrp0, uart0grp0, uart0grp1, uart1grp0,
uart2grp0, uart2grp1, uart3grp0, uart4grp0, uart5grp0
uart2grp0, uart2grp1, uart3grp0, uart4grp0, uart5grp0,
uart5nocts
cpuclkout: cpuclkoutgrp0
udlclkout: udlclkoutgrp0
i2c1: i2c1grp0
@@ -37,7 +38,7 @@ Required subnode-properties:
uart2: uart2grp0, uart2grp1
uart3: uart3grp0
uart4: uart4grp0
uart5: uart5grp0
uart5: uart5grp0, uart5nocts
nand: nandgrp0
sdio0: sdio0grp0
sdio1: sdio1grp0