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drm/xe: Load HuC on Alderlake S

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Alderlake S uses TGL HuC.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230323224651.1187366-3-lucas.demarchi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Anusha Srivatsa
2023-12-19 18:30:21 -05:00
committed by Rodrigo Vivi
parent 85ea2bd2fd
commit 9bddebf1f0
1 changed files with 1 additions and 0 deletions
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drivers/gpu/drm/xe/xe_uc_fw.c
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@@ -51,6 +51,7 @@ static struct xe_device *uc_fw_to_xe(struct xe_uc_fw *uc_fw)
fw_def(TIGERLAKE, 0, guc_def(tgl, 70, 5, 2))
#define XE_HUC_FIRMWARE_DEFS(fw_def, huc_def, huc_ver) \
fw_def(ALDERLAKE_S, 0, huc_def(tgl)) \
fw_def(DG1, 0, huc_def(dg1)) \
fw_def(TIGERLAKE, 0, huc_def(tgl))