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clk: qcom: a53: Corrected frequency multiplier for 1152MHz
[ Upstream commitbb56147ea9] The 1152MHz frequency entry for the a53 currently selects a multiplier of 62, giving 1190MHz. This changes the mulitiplier to 60 giving the intended 1152MHz. Signed-off-by: Phillip Varney <pbvarney@protonmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Fixes:0c6ab1b8f8("clk: qcom: Add A53 PLL support") Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260605005502.313928-1-pbvarney@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
5876f38b67
commit
a64d70d5e3
@@ -20,7 +20,7 @@
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static const struct pll_freq_tbl a53pll_freq[] = {
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{ 998400000, 52, 0x0, 0x1, 0 },
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{ 1094400000, 57, 0x0, 0x1, 0 },
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{ 1152000000, 62, 0x0, 0x1, 0 },
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{ 1152000000, 60, 0x0, 0x1, 0 },
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{ 1209600000, 63, 0x0, 0x1, 0 },
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{ 1248000000, 65, 0x0, 0x1, 0 },
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{ 1363200000, 71, 0x0, 0x1, 0 },
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