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iio: adc: ti-ads7950: use iio_push_to_buffers_with_ts_unaligned()
commit7806c060ccupstream. Use iio_push_to_buffers_with_ts_unaligned() to avoid unaligned access when writing the timestamp in the rx_buf. The previous implementation would have been fine on architectures that support 4-byte alignment of 64-bit integers but could cause issues on architectures that require 8-byte alignment. Fixes:902c4b2446("iio: adc: New driver for TI ADS7950 chips") Signed-off-by: David Lechner <dlechner@baylibre.com> Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman
parent
6cb599b802
commit
b285a41e75
@@ -47,8 +47,6 @@
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#define TI_ADS7950_MAX_CHAN 16
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#define TI_ADS7950_NUM_GPIOS 4
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#define TI_ADS7950_TIMESTAMP_SIZE (sizeof(int64_t) / sizeof(__be16))
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/* val = value, dec = left shift, bits = number of bits of the mask */
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#define TI_ADS7950_EXTRACT(val, dec, bits) \
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(((val) >> (dec)) & ((1 << (bits)) - 1))
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@@ -105,8 +103,7 @@ struct ti_ads7950_state {
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* DMA (thus cache coherency maintenance) may require the
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* transfer buffers to live in their own cache lines.
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*/
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u16 rx_buf[TI_ADS7950_MAX_CHAN + 2 + TI_ADS7950_TIMESTAMP_SIZE]
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__aligned(IIO_DMA_MINALIGN);
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u16 rx_buf[TI_ADS7950_MAX_CHAN + 2] __aligned(IIO_DMA_MINALIGN);
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u16 tx_buf[TI_ADS7950_MAX_CHAN + 2];
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u16 single_tx;
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u16 single_rx;
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@@ -313,8 +310,10 @@ static irqreturn_t ti_ads7950_trigger_handler(int irq, void *p)
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if (ret < 0)
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goto out;
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iio_push_to_buffers_with_timestamp(indio_dev, &st->rx_buf[2],
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iio_get_time_ns(indio_dev));
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iio_push_to_buffers_with_ts_unaligned(indio_dev, &st->rx_buf[2],
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sizeof(*st->rx_buf) *
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TI_ADS7950_MAX_CHAN,
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iio_get_time_ns(indio_dev));
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out:
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mutex_unlock(&st->slock);
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