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pinctrl: qcom: ipq4019: mark gpio as a GPIO pin function
The qcom pinctrl core supports marking functions that represent GPIO mode
via PINCTRL_GPIO_PINFUNCTION(), so that strict pinmuxing does not reject
GPIO requests for pins that are muxed to the GPIO function.
ipq4019 still describes its gpio function with QCA_PIN_FUNCTION(gpio),
so it is not treated as a GPIO pin function. As a result, GPIO consumers
can still conflict with pinctrl states that select the "gpio" function.
Add a QCA_GPIO_PIN_FUNCTION() helper and use it for the ipq4019 gpio
function, matching how the msm-based qcom drivers handle this.
This allows ipq4019 to keep the GPIO-related pin configuration in DTS
without tripping over strict pinmux ownership checks.
Fixes: cc85cb96e2 ("pinctrl: qcom: make the pinmuxing strict")
Signed-off-by: Til Kaiser <mail@tk154.de>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
This commit is contained in:
committed by
Linus Walleij
parent
b560d41423
commit
b51d33ea8a
@@ -479,7 +479,7 @@ static const struct pinfunction ipq4019_functions[] = {
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QCA_PIN_FUNCTION(blsp_uart0),
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QCA_PIN_FUNCTION(blsp_uart1),
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QCA_PIN_FUNCTION(chip_rst),
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QCA_PIN_FUNCTION(gpio),
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QCA_GPIO_PIN_FUNCTION(gpio),
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QCA_PIN_FUNCTION(i2s_rx),
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QCA_PIN_FUNCTION(i2s_spdif_in),
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QCA_PIN_FUNCTION(i2s_spdif_out),
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@@ -39,6 +39,11 @@ struct pinctrl_pin_desc;
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fname##_groups, \
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ARRAY_SIZE(fname##_groups))
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#define QCA_GPIO_PIN_FUNCTION(fname) \
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[qca_mux_##fname] = PINCTRL_GPIO_PINFUNCTION(#fname, \
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fname##_groups, \
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ARRAY_SIZE(fname##_groups))
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/**
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* struct msm_pingroup - Qualcomm pingroup definition
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* @grp: Generic data of the pin group (name and pins)
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