mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2026-04-29 12:28:27 +02:00
Merge tag 'ath-next-20250721' of git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath into wireless-next
Jeff Johnson says: ================== ath.git patches for v6.17 Highlights for some specific drivers include: ath9k: Add AHB "of" support ath11k: Support device-specific firmware override Fix potentially reordered access to device memory ath12k: Add more Wi-Fi 7 functionality Add more statistics to DebugFS Support different memory profiles Support 802.11 encap/decap offload to firmware Fix potentially reordered access to device memory And of course there is the usual set of cleanups and bug fixes across the entire family of "ath" drivers. ================== Signed-off-by: Johannes Berg <johannes.berg@intel.com>
This commit is contained in:
@@ -12,7 +12,7 @@ maintainers:
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description: |
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This node provides properties for configuring the ath9k wireless device.
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The node is expected to be specified as a child node of the PCI controller
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to which the wireless chip is connected.
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or AHB bus to which the wireless chip is connected.
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allOf:
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- $ref: ieee80211.yaml#
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@@ -35,6 +35,12 @@ properties:
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- pci168c,0034 # AR9462
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- pci168c,0036 # AR9565
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- pci168c,0037 # AR1111 and AR9485
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- qca,ar9130-wifi
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- qca,ar9330-wifi
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- qca,ar9340-wifi
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- qca,qca9530-wifi
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- qca,qca9550-wifi
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- qca,qca9560-wifi
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reg:
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maxItems: 1
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@@ -88,3 +94,13 @@ examples:
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nvmem-cell-names = "mac-address", "calibration";
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};
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};
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- |
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ahb {
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#address-cells = <1>;
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#size-cells = <1>;
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wifi@180c0000 {
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compatible = "qca,ar9130-wifi";
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reg = <0x180c0000 0x230000>;
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interrupts = <2>;
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};
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};
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@@ -35,6 +35,12 @@ properties:
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string to uniquely identify variant of the calibration data for designs
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with colliding bus and device ids
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firmware-name:
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maxItems: 1
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description:
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If present, a board or platform specific string used to lookup
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usecase-specific firmware files for the device.
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vddrfacmn-supply:
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description: VDD_RFA_CMN supply regulator handle
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@@ -1565,7 +1565,7 @@ static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
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bool with_chip_id)
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{
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/* strlen(',variant=') + strlen(ar->id.bdf_ext) */
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char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 };
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char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = {};
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if (with_variant && ar->id.bdf_ext[0] != '\0')
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scnprintf(variant, sizeof(variant), ",variant=%s",
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@@ -2493,12 +2493,50 @@ static int ath10k_init_hw_params(struct ath10k *ar)
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return 0;
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}
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static bool ath10k_core_needs_recovery(struct ath10k *ar)
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{
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long time_left;
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/* Sometimes the recovery will fail and then the next all recovery fail,
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* so avoid infinite recovery.
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*/
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if (atomic_read(&ar->fail_cont_count) >= ATH10K_RECOVERY_MAX_FAIL_COUNT) {
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ath10k_err(ar, "consecutive fail %d times, will shutdown driver!",
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atomic_read(&ar->fail_cont_count));
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ar->state = ATH10K_STATE_WEDGED;
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return false;
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}
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "total recovery count: %d", ++ar->recovery_count);
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if (atomic_read(&ar->pending_recovery)) {
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/* Sometimes it happened another recovery work before the previous one
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* completed, then the second recovery work will destroy the previous
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* one, thus below is to avoid that.
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*/
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time_left = wait_for_completion_timeout(&ar->driver_recovery,
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ATH10K_RECOVERY_TIMEOUT_HZ);
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if (time_left) {
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ath10k_warn(ar, "previous recovery succeeded, skip this!\n");
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return false;
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}
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/* Record the continuous recovery fail count when recovery failed. */
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atomic_inc(&ar->fail_cont_count);
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/* Avoid having multiple recoveries at the same time. */
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return false;
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}
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atomic_inc(&ar->pending_recovery);
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return true;
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}
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void ath10k_core_start_recovery(struct ath10k *ar)
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{
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if (test_and_set_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags)) {
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ath10k_warn(ar, "already restarting\n");
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if (!ath10k_core_needs_recovery(ar))
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return;
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}
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queue_work(ar->workqueue, &ar->restart_work);
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}
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@@ -2534,6 +2572,8 @@ static void ath10k_core_restart(struct work_struct *work)
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struct ath10k *ar = container_of(work, struct ath10k, restart_work);
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int ret;
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reinit_completion(&ar->driver_recovery);
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set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
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/* Place a barrier to make sure the compiler doesn't reorder
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@@ -2598,8 +2638,6 @@ static void ath10k_core_restart(struct work_struct *work)
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if (ret)
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ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d",
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ret);
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complete(&ar->driver_recovery);
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}
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static void ath10k_core_set_coverage_class_work(struct work_struct *work)
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@@ -4,6 +4,7 @@
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* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
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* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#ifndef _CORE_H_
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@@ -87,6 +88,8 @@
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IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
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#define ATH10K_ITER_RESUME_FLAGS (IEEE80211_IFACE_ITER_RESUME_ALL |\
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IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER)
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#define ATH10K_RECOVERY_TIMEOUT_HZ (5 * HZ)
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#define ATH10K_RECOVERY_MAX_FAIL_COUNT 4
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struct ath10k;
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@@ -779,7 +782,7 @@ enum ath10k_fw_features {
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/* Firmware supports bypassing PLL setting on init. */
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ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
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/* Raw mode support. If supported, FW supports receiving and trasmitting
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/* Raw mode support. If supported, FW supports receiving and transmitting
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* frames in raw mode.
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*/
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ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
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@@ -865,9 +868,6 @@ enum ath10k_dev_flags {
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/* Per Station statistics service */
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ATH10K_FLAG_PEER_STATS,
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/* Indicates that ath10k device is during recovery process and not complete */
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ATH10K_FLAG_RESTARTING,
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/* protected by conf_mutex */
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ATH10K_FLAG_NAPI_ENABLED,
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};
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@@ -1211,6 +1211,11 @@ struct ath10k {
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struct work_struct bundle_tx_work;
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struct work_struct tx_complete_work;
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atomic_t pending_recovery;
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unsigned int recovery_count;
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/* continuous recovery fail count */
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atomic_t fail_cont_count;
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/* cycle count is reported twice for each visited channel during scan.
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* access protected by data_lock
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*/
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@@ -547,7 +547,7 @@ static ssize_t ath10k_write_simulate_fw_crash(struct file *file,
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size_t count, loff_t *ppos)
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{
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struct ath10k *ar = file->private_data;
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char buf[32] = {0};
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char buf[32] = {};
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ssize_t rc;
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int ret;
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@@ -983,7 +983,7 @@ static ssize_t ath10k_write_htt_max_amsdu_ampdu(struct file *file,
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{
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struct ath10k *ar = file->private_data;
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int res;
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char buf[64] = {0};
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char buf[64] = {};
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unsigned int amsdu, ampdu;
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res = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,
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@@ -1039,7 +1039,7 @@ static ssize_t ath10k_write_fw_dbglog(struct file *file,
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{
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struct ath10k *ar = file->private_data;
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int ret;
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char buf[96] = {0};
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char buf[96] = {};
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unsigned int log_level;
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u64 mask;
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@@ -3,6 +3,7 @@
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* Copyright (c) 2014-2017 Qualcomm Atheros, Inc.
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
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*/
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#include "core.h"
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@@ -244,7 +245,7 @@ static ssize_t ath10k_dbg_sta_write_addba(struct file *file,
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struct ath10k *ar = arsta->arvif->ar;
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u32 tid, buf_size;
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int ret;
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char buf[64] = {0};
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char buf[64] = {};
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ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,
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user_buf, count);
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@@ -295,7 +296,7 @@ static ssize_t ath10k_dbg_sta_write_addba_resp(struct file *file,
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struct ath10k *ar = arsta->arvif->ar;
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u32 tid, status;
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int ret;
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char buf[64] = {0};
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char buf[64] = {};
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ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,
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user_buf, count);
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@@ -345,7 +346,7 @@ static ssize_t ath10k_dbg_sta_write_delba(struct file *file,
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struct ath10k *ar = arsta->arvif->ar;
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u32 tid, initiator, reason;
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int ret;
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char buf[64] = {0};
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char buf[64] = {};
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ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,
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user_buf, count);
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@@ -1884,7 +1884,7 @@ static bool ath10k_htt_rx_h_frag_pn_check(struct ath10k *ar,
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enum htt_rx_mpdu_encrypt_type enctype)
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{
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struct ath10k_peer *peer;
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union htt_rx_pn_t *last_pn, new_pn = {0};
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union htt_rx_pn_t *last_pn, new_pn = {};
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struct ieee80211_hdr *hdr;
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u8 tid, frag_number;
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u32 seq;
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@@ -2402,7 +2402,7 @@ static bool ath10k_htt_rx_pn_check_replay_hl(struct ath10k *ar,
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bool last_pn_valid, pn_invalid = false;
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enum htt_txrx_sec_cast_type sec_index;
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enum htt_security_types sec_type;
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union htt_rx_pn_t new_pn = {0};
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union htt_rx_pn_t new_pn = {};
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struct htt_hl_rx_desc *rx_desc;
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union htt_rx_pn_t *last_pn;
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u32 rx_desc_info, tid;
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@@ -2465,7 +2465,7 @@ static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt,
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struct fw_rx_desc_hl *fw_desc;
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enum htt_txrx_sec_cast_type sec_index;
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enum htt_security_types sec_type;
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union htt_rx_pn_t new_pn = {0};
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union htt_rx_pn_t new_pn = {};
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struct htt_hl_rx_desc *rx_desc;
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struct ieee80211_hdr *hdr;
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struct ieee80211_rx_status *rx_status;
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@@ -2767,7 +2767,7 @@ static bool ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt *htt,
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struct htt_rx_indication_hl *rx_hl;
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enum htt_security_types sec_type;
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u32 tid, frag, seq, rx_desc_info;
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union htt_rx_pn_t new_pn = {0};
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union htt_rx_pn_t new_pn = {};
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struct htt_hl_rx_desc *rx_desc;
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u16 peer_id, sc, hdr_space;
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union htt_rx_pn_t *last_pn;
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@@ -510,7 +510,7 @@ static int ath10k_htt_tx_clean_up_pending(int msdu_id, void *skb, void *ctx)
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{
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struct ath10k *ar = ctx;
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struct ath10k_htt *htt = &ar->htt;
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struct htt_tx_done tx_done = {0};
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struct htt_tx_done tx_done = {};
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ath10k_dbg(ar, ATH10K_DBG_HTT, "force cleanup msdu_id %u\n", msdu_id);
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@@ -560,7 +560,7 @@ void ath10k_htt_op_ep_tx_credits(struct ath10k *ar)
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void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
|
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{
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struct ath10k_htt *htt = &ar->htt;
|
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struct htt_tx_done tx_done = {0};
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struct htt_tx_done tx_done = {};
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struct htt_cmd_hdr *htt_hdr;
|
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struct htt_data_tx_desc *desc_hdr = NULL;
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u16 flags1 = 0;
|
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|
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@@ -3385,7 +3385,7 @@ static int ath10k_update_channel_list(struct ath10k *ar)
|
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struct ieee80211_supported_band **bands;
|
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enum nl80211_band band;
|
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struct ieee80211_channel *channel;
|
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struct wmi_scan_chan_list_arg arg = {0};
|
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struct wmi_scan_chan_list_arg arg = {};
|
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struct wmi_channel_arg *ch;
|
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bool passive;
|
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int len;
|
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@@ -4885,7 +4885,7 @@ static int ath10k_mac_get_vht_cap_bf_sound_dim(struct ath10k *ar)
|
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|
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static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar)
|
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{
|
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struct ieee80211_sta_vht_cap vht_cap = {0};
|
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struct ieee80211_sta_vht_cap vht_cap = {};
|
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struct ath10k_hw_params *hw = &ar->hw_params;
|
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u16 mcs_map;
|
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u32 val;
|
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@@ -4943,7 +4943,7 @@ static struct ieee80211_sta_vht_cap ath10k_create_vht_cap(struct ath10k *ar)
|
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static struct ieee80211_sta_ht_cap ath10k_get_ht_cap(struct ath10k *ar)
|
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{
|
||||
int i;
|
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struct ieee80211_sta_ht_cap ht_cap = {0};
|
||||
struct ieee80211_sta_ht_cap ht_cap = {};
|
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|
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if (!(ar->ht_cap_info & WMI_HT_CAP_ENABLED))
|
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return ht_cap;
|
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@@ -5175,7 +5175,7 @@ static int ath10k_start(struct ieee80211_hw *hw)
|
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struct ath10k *ar = hw->priv;
|
||||
u32 param;
|
||||
int ret = 0;
|
||||
struct wmi_bb_timing_cfg_arg bb_timing = {0};
|
||||
struct wmi_bb_timing_cfg_arg bb_timing = {};
|
||||
|
||||
/*
|
||||
* This makes sense only when restarting hw. It is harmless to call
|
||||
@@ -8162,7 +8162,12 @@ static void ath10k_reconfig_complete(struct ieee80211_hw *hw,
|
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ath10k_info(ar, "device successfully recovered\n");
|
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ar->state = ATH10K_STATE_ON;
|
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ieee80211_wake_queues(ar->hw);
|
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clear_bit(ATH10K_FLAG_RESTARTING, &ar->dev_flags);
|
||||
|
||||
/* Clear recovery state. */
|
||||
complete(&ar->driver_recovery);
|
||||
atomic_set(&ar->fail_cont_count, 0);
|
||||
atomic_set(&ar->pending_recovery, 0);
|
||||
|
||||
if (ar->hw_params.hw_restart_disconnect) {
|
||||
list_for_each_entry(arvif, &ar->arvifs, list) {
|
||||
if (arvif->is_up && arvif->vdev_type == WMI_VDEV_TYPE_STA)
|
||||
|
||||
@@ -3,6 +3,7 @@
|
||||
* Copyright (c) 2005-2011 Atheros Communications Inc.
|
||||
* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
|
||||
* Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <linux/pci.h>
|
||||
@@ -63,7 +64,7 @@ static const struct pci_device_id ath10k_pci_id_table[] = {
|
||||
{ PCI_VDEVICE(ATHEROS, QCA9984_1_0_DEVICE_ID) }, /* PCI-E QCA9984 V1 */
|
||||
{ PCI_VDEVICE(ATHEROS, QCA9377_1_0_DEVICE_ID) }, /* PCI-E QCA9377 V1 */
|
||||
{ PCI_VDEVICE(ATHEROS, QCA9887_1_0_DEVICE_ID) }, /* PCI-E QCA9887 */
|
||||
{0}
|
||||
{}
|
||||
};
|
||||
|
||||
static const struct ath10k_pci_supp_chip ath10k_pci_supp_chips[] = {
|
||||
|
||||
@@ -4,6 +4,7 @@
|
||||
* Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
|
||||
* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <linux/skbuff.h>
|
||||
@@ -1941,6 +1942,11 @@ int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
|
||||
}
|
||||
|
||||
wait_event_timeout(ar->wmi.tx_credits_wq, ({
|
||||
if (ar->state == ATH10K_STATE_WEDGED) {
|
||||
ret = -ESHUTDOWN;
|
||||
ath10k_dbg(ar, ATH10K_DBG_WMI,
|
||||
"drop wmi command %d, hardware is wedged\n", cmd_id);
|
||||
}
|
||||
/* try to send pending beacons first. they take priority */
|
||||
ath10k_wmi_tx_beacons_nowait(ar);
|
||||
|
||||
|
||||
@@ -988,7 +988,7 @@ static int ath11k_ahb_fw_resources_init(struct ath11k_base *ab)
|
||||
{
|
||||
struct ath11k_ahb *ab_ahb = ath11k_ahb_priv(ab);
|
||||
struct device *host_dev = ab->dev;
|
||||
struct platform_device_info info = {0};
|
||||
struct platform_device_info info = {};
|
||||
struct iommu_domain *iommu_dom;
|
||||
struct platform_device *pdev;
|
||||
struct device_node *node;
|
||||
|
||||
@@ -395,9 +395,6 @@ static int ath11k_ce_completed_recv_next(struct ath11k_ce_pipe *pipe,
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* Make sure descriptor is read after the head pointer. */
|
||||
dma_rmb();
|
||||
|
||||
*nbytes = ath11k_hal_ce_dst_status_get_length(desc);
|
||||
|
||||
*skb = pipe->dest_ring->skb[sw_index];
|
||||
@@ -557,7 +554,7 @@ static int ath11k_ce_init_ring(struct ath11k_base *ab,
|
||||
struct ath11k_ce_ring *ce_ring,
|
||||
int ce_id, enum hal_ring_type type)
|
||||
{
|
||||
struct hal_srng_params params = { 0 };
|
||||
struct hal_srng_params params = {};
|
||||
int ret;
|
||||
|
||||
params.ring_base_paddr = ce_ring->base_addr_ce_space;
|
||||
|
||||
@@ -1393,7 +1393,7 @@ static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name,
|
||||
enum ath11k_bdf_name_type name_type)
|
||||
{
|
||||
/* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
|
||||
char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
|
||||
char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = {};
|
||||
|
||||
if (with_variant && ab->qmi.target.bdf_ext[0] != '\0')
|
||||
scnprintf(variant, sizeof(variant), ",variant=%s",
|
||||
@@ -2583,10 +2583,15 @@ int ath11k_core_init(struct ath11k_base *ab)
|
||||
ret = ath11k_core_soc_create(ab);
|
||||
if (ret) {
|
||||
ath11k_err(ab, "failed to create soc core: %d\n", ret);
|
||||
return ret;
|
||||
goto err_unregister_pm_notifier;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_unregister_pm_notifier:
|
||||
ath11k_core_pm_notifier_unregister(ab);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(ath11k_core_init);
|
||||
|
||||
|
||||
@@ -17,6 +17,7 @@
|
||||
#include <linux/average.h>
|
||||
#include <linux/firmware.h>
|
||||
#include <linux/suspend.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include "qmi.h"
|
||||
#include "htc.h"
|
||||
@@ -1322,8 +1323,16 @@ static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
|
||||
const char *filename,
|
||||
void *buf, size_t buf_len)
|
||||
{
|
||||
snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
|
||||
ab->hw_params.fw.dir, filename);
|
||||
const char *fw_name = NULL;
|
||||
|
||||
of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name);
|
||||
|
||||
if (fw_name && strncmp(filename, "board", 5))
|
||||
snprintf(buf, buf_len, "%s/%s/%s/%s", ATH11K_FW_DIR,
|
||||
ab->hw_params.fw.dir, fw_name, filename);
|
||||
else
|
||||
snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
|
||||
ab->hw_params.fw.dir, filename);
|
||||
}
|
||||
|
||||
static inline const char *ath11k_bus_str(enum ath11k_bus bus)
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
/*
|
||||
* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include "core.h"
|
||||
@@ -153,7 +154,7 @@ int ath11k_dbring_wmi_cfg_setup(struct ath11k *ar,
|
||||
struct ath11k_dbring *ring,
|
||||
enum wmi_direct_buffer_module id)
|
||||
{
|
||||
struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd param = {0};
|
||||
struct ath11k_wmi_pdev_dma_ring_cfg_req_cmd param = {};
|
||||
int ret;
|
||||
|
||||
if (id >= WMI_DIRECT_BUF_MAX)
|
||||
|
||||
@@ -375,7 +375,7 @@ static ssize_t ath11k_write_simulate_fw_crash(struct file *file,
|
||||
struct ath11k_base *ab = file->private_data;
|
||||
struct ath11k_pdev *pdev;
|
||||
struct ath11k *ar = ab->pdevs[0].ar;
|
||||
char buf[32] = {0};
|
||||
char buf[32] = {};
|
||||
ssize_t rc;
|
||||
int i, ret, radioup = 0;
|
||||
|
||||
@@ -473,7 +473,7 @@ static ssize_t ath11k_read_enable_extd_tx_stats(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
|
||||
{
|
||||
char buf[32] = {0};
|
||||
char buf[32] = {};
|
||||
struct ath11k *ar = file->private_data;
|
||||
int len = 0;
|
||||
|
||||
@@ -497,7 +497,7 @@ static ssize_t ath11k_write_extd_rx_stats(struct file *file,
|
||||
{
|
||||
struct ath11k *ar = file->private_data;
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
u32 enable, rx_filter = 0, ring_id;
|
||||
int i;
|
||||
int ret;
|
||||
@@ -737,7 +737,7 @@ static ssize_t ath11k_write_fw_dbglog(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath11k *ar = file->private_data;
|
||||
char buf[128] = {0};
|
||||
char buf[128] = {};
|
||||
struct ath11k_fw_dbglog dbglog;
|
||||
unsigned int param, mod_id_index, is_end;
|
||||
u64 value;
|
||||
@@ -950,9 +950,9 @@ static ssize_t ath11k_write_pktlog_filter(struct file *file,
|
||||
{
|
||||
struct ath11k *ar = file->private_data;
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
u32 rx_filter = 0, ring_id, filter, mode;
|
||||
u8 buf[128] = {0};
|
||||
u8 buf[128] = {};
|
||||
int i, ret, rx_buf_sz = 0;
|
||||
ssize_t rc;
|
||||
|
||||
@@ -1081,7 +1081,7 @@ static ssize_t ath11k_read_pktlog_filter(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
|
||||
{
|
||||
char buf[32] = {0};
|
||||
char buf[32] = {};
|
||||
struct ath11k *ar = file->private_data;
|
||||
int len = 0;
|
||||
|
||||
@@ -1235,7 +1235,7 @@ static ssize_t ath11k_debugfs_write_enable_dbr_dbg(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath11k *ar = file->private_data;
|
||||
char buf[32] = {0};
|
||||
char buf[32] = {};
|
||||
u32 dbr_id, enable;
|
||||
int ret;
|
||||
|
||||
@@ -1473,7 +1473,7 @@ int ath11k_debugfs_register(struct ath11k *ar)
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
char pdev_name[10];
|
||||
char buf[100] = {0};
|
||||
char buf[100] = {};
|
||||
|
||||
snprintf(pdev_name, sizeof(pdev_name), "%s%u", "mac", ar->pdev_idx);
|
||||
|
||||
@@ -1556,10 +1556,10 @@ static ssize_t ath11k_write_twt_add_dialog(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath11k_vif *arvif = file->private_data;
|
||||
struct wmi_twt_add_dialog_params params = { 0 };
|
||||
struct wmi_twt_enable_params twt_params = {0};
|
||||
struct wmi_twt_add_dialog_params params = {};
|
||||
struct wmi_twt_enable_params twt_params = {};
|
||||
struct ath11k *ar = arvif->ar;
|
||||
u8 buf[128] = {0};
|
||||
u8 buf[128] = {};
|
||||
int ret;
|
||||
|
||||
if (ar->twt_enabled == 0) {
|
||||
@@ -1632,10 +1632,10 @@ static ssize_t ath11k_write_twt_del_dialog(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath11k_vif *arvif = file->private_data;
|
||||
struct wmi_twt_del_dialog_params params = { 0 };
|
||||
struct wmi_twt_enable_params twt_params = {0};
|
||||
struct wmi_twt_del_dialog_params params = {};
|
||||
struct wmi_twt_enable_params twt_params = {};
|
||||
struct ath11k *ar = arvif->ar;
|
||||
u8 buf[64] = {0};
|
||||
u8 buf[64] = {};
|
||||
int ret;
|
||||
|
||||
if (ar->twt_enabled == 0) {
|
||||
@@ -1679,8 +1679,8 @@ static ssize_t ath11k_write_twt_pause_dialog(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath11k_vif *arvif = file->private_data;
|
||||
struct wmi_twt_pause_dialog_params params = { 0 };
|
||||
u8 buf[64] = {0};
|
||||
struct wmi_twt_pause_dialog_params params = {};
|
||||
u8 buf[64] = {};
|
||||
int ret;
|
||||
|
||||
if (arvif->ar->twt_enabled == 0) {
|
||||
@@ -1718,8 +1718,8 @@ static ssize_t ath11k_write_twt_resume_dialog(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath11k_vif *arvif = file->private_data;
|
||||
struct wmi_twt_resume_dialog_params params = { 0 };
|
||||
u8 buf[64] = {0};
|
||||
struct wmi_twt_resume_dialog_params params = {};
|
||||
u8 buf[64] = {};
|
||||
int ret;
|
||||
|
||||
if (arvif->ar->twt_enabled == 0) {
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
/*
|
||||
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <linux/vmalloc.h>
|
||||
@@ -375,7 +376,7 @@ static inline void htt_print_hw_stats_intr_misc_tlv(const void *tag_buf,
|
||||
u8 *buf = stats_req->buf;
|
||||
u32 len = stats_req->buf_len;
|
||||
u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
|
||||
char hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN + 1] = {0};
|
||||
char hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN + 1] = {};
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_HW_STATS_INTR_MISC_TLV:\n");
|
||||
memcpy(hw_intr_name, &(htt_stats_buf->hw_intr_name[0]),
|
||||
@@ -402,7 +403,7 @@ htt_print_hw_stats_wd_timeout_tlv(const void *tag_buf,
|
||||
u8 *buf = stats_req->buf;
|
||||
u32 len = stats_req->buf_len;
|
||||
u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
|
||||
char hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN + 1] = {0};
|
||||
char hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN + 1] = {};
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_HW_STATS_WD_TIMEOUT_TLV:\n");
|
||||
memcpy(hw_module_name, &(htt_stats_buf->hw_module_name[0]),
|
||||
@@ -514,7 +515,7 @@ static inline void htt_print_tx_tid_stats_tlv(const void *tag_buf,
|
||||
u8 *buf = stats_req->buf;
|
||||
u32 len = stats_req->buf_len;
|
||||
u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
|
||||
char tid_name[MAX_HTT_TID_NAME + 1] = {0};
|
||||
char tid_name[MAX_HTT_TID_NAME + 1] = {};
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_TX_TID_STATS_TLV:\n");
|
||||
memcpy(tid_name, &(htt_stats_buf->tid_name[0]), MAX_HTT_TID_NAME);
|
||||
@@ -567,7 +568,7 @@ static inline void htt_print_tx_tid_stats_v1_tlv(const void *tag_buf,
|
||||
u8 *buf = stats_req->buf;
|
||||
u32 len = stats_req->buf_len;
|
||||
u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
|
||||
char tid_name[MAX_HTT_TID_NAME + 1] = {0};
|
||||
char tid_name[MAX_HTT_TID_NAME + 1] = {};
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_TX_TID_STATS_V1_TLV:\n");
|
||||
memcpy(tid_name, &(htt_stats_buf->tid_name[0]), MAX_HTT_TID_NAME);
|
||||
@@ -624,7 +625,7 @@ static inline void htt_print_rx_tid_stats_tlv(const void *tag_buf,
|
||||
u8 *buf = stats_req->buf;
|
||||
u32 len = stats_req->buf_len;
|
||||
u32 buf_len = ATH11K_HTT_STATS_BUF_SIZE;
|
||||
char tid_name[MAX_HTT_TID_NAME + 1] = {0};
|
||||
char tid_name[MAX_HTT_TID_NAME + 1] = {};
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_RX_TID_STATS_TLV:\n");
|
||||
len += scnprintf(buf + len, buf_len - len, "sw_peer_id = %lu\n",
|
||||
@@ -4712,7 +4713,7 @@ int ath11k_debugfs_htt_stats_req(struct ath11k *ar)
|
||||
u8 type = stats_req->type;
|
||||
u64 cookie = 0;
|
||||
int ret, pdev_id = ar->pdev->pdev_id;
|
||||
struct htt_ext_stats_cfg_params cfg_params = { 0 };
|
||||
struct htt_ext_stats_cfg_params cfg_params = {};
|
||||
|
||||
init_completion(&stats_req->cmpln);
|
||||
|
||||
@@ -4852,7 +4853,7 @@ static ssize_t ath11k_write_htt_stats_reset(struct file *file,
|
||||
{
|
||||
struct ath11k *ar = file->private_data;
|
||||
u8 type;
|
||||
struct htt_ext_stats_cfg_params cfg_params = { 0 };
|
||||
struct htt_ext_stats_cfg_params cfg_params = {};
|
||||
int ret;
|
||||
|
||||
ret = kstrtou8_from_user(user_buf, count, 0, &type);
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
/*
|
||||
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <linux/vmalloc.h>
|
||||
@@ -456,7 +457,7 @@ static ssize_t ath11k_dbg_sta_read_peer_pktlog(struct file *file,
|
||||
struct ieee80211_sta *sta = file->private_data;
|
||||
struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
|
||||
struct ath11k *ar = arsta->arvif->ar;
|
||||
char buf[32] = {0};
|
||||
char buf[32] = {};
|
||||
int len;
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
@@ -485,7 +486,7 @@ static ssize_t ath11k_dbg_sta_write_delba(struct file *file,
|
||||
struct ath11k *ar = arsta->arvif->ar;
|
||||
u32 tid, initiator, reason;
|
||||
int ret;
|
||||
char buf[64] = {0};
|
||||
char buf[64] = {};
|
||||
|
||||
ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,
|
||||
user_buf, count);
|
||||
@@ -536,7 +537,7 @@ static ssize_t ath11k_dbg_sta_write_addba_resp(struct file *file,
|
||||
struct ath11k *ar = arsta->arvif->ar;
|
||||
u32 tid, status;
|
||||
int ret;
|
||||
char buf[64] = {0};
|
||||
char buf[64] = {};
|
||||
|
||||
ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,
|
||||
user_buf, count);
|
||||
@@ -586,7 +587,7 @@ static ssize_t ath11k_dbg_sta_write_addba(struct file *file,
|
||||
struct ath11k *ar = arsta->arvif->ar;
|
||||
u32 tid, buf_size;
|
||||
int ret;
|
||||
char buf[64] = {0};
|
||||
char buf[64] = {};
|
||||
|
||||
ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos,
|
||||
user_buf, count);
|
||||
@@ -700,7 +701,7 @@ ath11k_write_htt_peer_stats_reset(struct file *file,
|
||||
struct ieee80211_sta *sta = file->private_data;
|
||||
struct ath11k_sta *arsta = ath11k_sta_to_arsta(sta);
|
||||
struct ath11k *ar = arsta->arvif->ar;
|
||||
struct htt_ext_stats_cfg_params cfg_params = { 0 };
|
||||
struct htt_ext_stats_cfg_params cfg_params = {};
|
||||
int ret;
|
||||
u8 type;
|
||||
|
||||
|
||||
@@ -225,7 +225,7 @@ int ath11k_dp_srng_setup(struct ath11k_base *ab, struct dp_srng *ring,
|
||||
enum hal_ring_type type, int ring_num,
|
||||
int mac_id, int num_entries)
|
||||
{
|
||||
struct hal_srng_params params = { 0 };
|
||||
struct hal_srng_params params = {};
|
||||
int entry_sz = ath11k_hal_srng_get_entrysize(ab, type);
|
||||
int max_entries = ath11k_hal_srng_get_max_entries(ab, type);
|
||||
int ret;
|
||||
|
||||
@@ -719,7 +719,7 @@ static void ath11k_dp_reo_cmd_free(struct ath11k_dp *dp, void *ctx,
|
||||
static void ath11k_dp_reo_cache_flush(struct ath11k_base *ab,
|
||||
struct dp_rx_tid *rx_tid)
|
||||
{
|
||||
struct ath11k_hal_reo_cmd cmd = {0};
|
||||
struct ath11k_hal_reo_cmd cmd = {};
|
||||
unsigned long tot_desc_sz, desc_sz;
|
||||
int ret;
|
||||
|
||||
@@ -811,7 +811,7 @@ free_desc:
|
||||
void ath11k_peer_rx_tid_delete(struct ath11k *ar,
|
||||
struct ath11k_peer *peer, u8 tid)
|
||||
{
|
||||
struct ath11k_hal_reo_cmd cmd = {0};
|
||||
struct ath11k_hal_reo_cmd cmd = {};
|
||||
struct dp_rx_tid *rx_tid = &peer->rx_tid[tid];
|
||||
int ret;
|
||||
|
||||
@@ -938,7 +938,7 @@ static int ath11k_peer_rx_tid_reo_update(struct ath11k *ar,
|
||||
u32 ba_win_sz, u16 ssn,
|
||||
bool update_ssn)
|
||||
{
|
||||
struct ath11k_hal_reo_cmd cmd = {0};
|
||||
struct ath11k_hal_reo_cmd cmd = {};
|
||||
int ret;
|
||||
|
||||
cmd.addr_lo = lower_32_bits(rx_tid->paddr);
|
||||
@@ -1157,7 +1157,7 @@ int ath11k_dp_peer_rx_pn_replay_config(struct ath11k_vif *arvif,
|
||||
{
|
||||
struct ath11k *ar = arvif->ar;
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct ath11k_hal_reo_cmd cmd = {0};
|
||||
struct ath11k_hal_reo_cmd cmd = {};
|
||||
struct ath11k_peer *peer;
|
||||
struct dp_rx_tid *rx_tid;
|
||||
u8 tid;
|
||||
@@ -2591,7 +2591,7 @@ static void ath11k_dp_rx_process_received_packets(struct ath11k_base *ab,
|
||||
{
|
||||
struct sk_buff *msdu;
|
||||
struct ath11k *ar;
|
||||
struct ieee80211_rx_status rx_status = {0};
|
||||
struct ieee80211_rx_status rx_status = {};
|
||||
int ret;
|
||||
|
||||
if (skb_queue_empty(msdu_list))
|
||||
@@ -2626,7 +2626,7 @@ int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
|
||||
{
|
||||
struct ath11k_dp *dp = &ab->dp;
|
||||
struct dp_rxdma_ring *rx_ring;
|
||||
int num_buffs_reaped[MAX_RADIOS] = {0};
|
||||
int num_buffs_reaped[MAX_RADIOS] = {};
|
||||
struct sk_buff_head msdu_list[MAX_RADIOS];
|
||||
struct ath11k_skb_rxcb *rxcb;
|
||||
int total_msdu_reaped = 0;
|
||||
@@ -2637,7 +2637,7 @@ int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
|
||||
struct ath11k *ar;
|
||||
struct hal_reo_dest_ring *desc;
|
||||
enum hal_reo_dest_ring_push_reason push_reason;
|
||||
u32 cookie, info0, rx_msdu_info0, rx_mpdu_info0;
|
||||
u32 cookie;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < MAX_RADIOS; i++)
|
||||
@@ -2650,14 +2650,11 @@ int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id,
|
||||
try_again:
|
||||
ath11k_hal_srng_access_begin(ab, srng);
|
||||
|
||||
/* Make sure descriptor is read after the head pointer. */
|
||||
dma_rmb();
|
||||
|
||||
while (likely(desc =
|
||||
(struct hal_reo_dest_ring *)ath11k_hal_srng_dst_get_next_entry(ab,
|
||||
srng))) {
|
||||
cookie = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
|
||||
READ_ONCE(desc->buf_addr_info.info1));
|
||||
desc->buf_addr_info.info1);
|
||||
buf_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_BUF_ID,
|
||||
cookie);
|
||||
mac_id = FIELD_GET(DP_RXDMA_BUF_COOKIE_PDEV_ID, cookie);
|
||||
@@ -2686,9 +2683,8 @@ try_again:
|
||||
|
||||
num_buffs_reaped[mac_id]++;
|
||||
|
||||
info0 = READ_ONCE(desc->info0);
|
||||
push_reason = FIELD_GET(HAL_REO_DEST_RING_INFO0_PUSH_REASON,
|
||||
info0);
|
||||
desc->info0);
|
||||
if (unlikely(push_reason !=
|
||||
HAL_REO_DEST_RING_PUSH_REASON_ROUTING_INSTRUCTION)) {
|
||||
dev_kfree_skb_any(msdu);
|
||||
@@ -2696,21 +2692,18 @@ try_again:
|
||||
continue;
|
||||
}
|
||||
|
||||
rx_msdu_info0 = READ_ONCE(desc->rx_msdu_info.info0);
|
||||
rx_mpdu_info0 = READ_ONCE(desc->rx_mpdu_info.info0);
|
||||
|
||||
rxcb->is_first_msdu = !!(rx_msdu_info0 &
|
||||
rxcb->is_first_msdu = !!(desc->rx_msdu_info.info0 &
|
||||
RX_MSDU_DESC_INFO0_FIRST_MSDU_IN_MPDU);
|
||||
rxcb->is_last_msdu = !!(rx_msdu_info0 &
|
||||
rxcb->is_last_msdu = !!(desc->rx_msdu_info.info0 &
|
||||
RX_MSDU_DESC_INFO0_LAST_MSDU_IN_MPDU);
|
||||
rxcb->is_continuation = !!(rx_msdu_info0 &
|
||||
rxcb->is_continuation = !!(desc->rx_msdu_info.info0 &
|
||||
RX_MSDU_DESC_INFO0_MSDU_CONTINUATION);
|
||||
rxcb->peer_id = FIELD_GET(RX_MPDU_DESC_META_DATA_PEER_ID,
|
||||
READ_ONCE(desc->rx_mpdu_info.meta_data));
|
||||
desc->rx_mpdu_info.meta_data);
|
||||
rxcb->seq_no = FIELD_GET(RX_MPDU_DESC_INFO0_SEQ_NUM,
|
||||
rx_mpdu_info0);
|
||||
desc->rx_mpdu_info.info0);
|
||||
rxcb->tid = FIELD_GET(HAL_REO_DEST_RING_INFO0_RX_QUEUE_NUM,
|
||||
info0);
|
||||
desc->info0);
|
||||
|
||||
rxcb->mac_id = mac_id;
|
||||
__skb_queue_tail(&msdu_list[mac_id], msdu);
|
||||
@@ -3231,7 +3224,7 @@ static int ath11k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,
|
||||
size_t data_len, u8 *mic)
|
||||
{
|
||||
SHASH_DESC_ON_STACK(desc, tfm);
|
||||
u8 mic_hdr[16] = {0};
|
||||
u8 mic_hdr[16] = {};
|
||||
u8 tid = 0;
|
||||
int ret;
|
||||
|
||||
@@ -3825,7 +3818,7 @@ int ath11k_dp_process_rx_err(struct ath11k_base *ab, struct napi_struct *napi,
|
||||
struct dp_link_desc_bank *link_desc_banks;
|
||||
enum hal_rx_buf_return_buf_manager rbm;
|
||||
int tot_n_bufs_reaped, quota, ret, i;
|
||||
int n_bufs_reaped[MAX_RADIOS] = {0};
|
||||
int n_bufs_reaped[MAX_RADIOS] = {};
|
||||
struct dp_rxdma_ring *rx_ring;
|
||||
struct dp_srng *reo_except;
|
||||
u32 desc_bank, num_msdus;
|
||||
@@ -4106,7 +4099,7 @@ static void ath11k_dp_rx_wbm_err(struct ath11k *ar,
|
||||
struct sk_buff_head *msdu_list)
|
||||
{
|
||||
struct ath11k_skb_rxcb *rxcb = ATH11K_SKB_RXCB(msdu);
|
||||
struct ieee80211_rx_status rxs = {0};
|
||||
struct ieee80211_rx_status rxs = {};
|
||||
bool drop = true;
|
||||
|
||||
switch (rxcb->err_rel_src) {
|
||||
@@ -4142,7 +4135,7 @@ int ath11k_dp_rx_process_wbm_err(struct ath11k_base *ab,
|
||||
struct ath11k_skb_rxcb *rxcb;
|
||||
u32 *rx_desc;
|
||||
int buf_id, mac_id;
|
||||
int num_buffs_reaped[MAX_RADIOS] = {0};
|
||||
int num_buffs_reaped[MAX_RADIOS] = {};
|
||||
int total_num_buffs_reaped = 0;
|
||||
int ret, i;
|
||||
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
/*
|
||||
* Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include "core.h"
|
||||
@@ -84,7 +85,7 @@ int ath11k_dp_tx(struct ath11k *ar, struct ath11k_vif *arvif,
|
||||
{
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct ath11k_dp *dp = &ab->dp;
|
||||
struct hal_tx_info ti = {0};
|
||||
struct hal_tx_info ti = {};
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb);
|
||||
struct hal_srng *tcl_ring;
|
||||
@@ -316,7 +317,7 @@ ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab,
|
||||
struct dp_tx_ring *tx_ring,
|
||||
struct ath11k_dp_htt_wbm_tx_status *ts)
|
||||
{
|
||||
struct ieee80211_tx_status status = { 0 };
|
||||
struct ieee80211_tx_status status = {};
|
||||
struct sk_buff *msdu;
|
||||
struct ieee80211_tx_info *info;
|
||||
struct ath11k_skb_cb *skb_cb;
|
||||
@@ -391,7 +392,7 @@ ath11k_dp_tx_process_htt_tx_complete(struct ath11k_base *ab,
|
||||
u32 msdu_id, struct dp_tx_ring *tx_ring)
|
||||
{
|
||||
struct htt_tx_wbm_completion *status_desc;
|
||||
struct ath11k_dp_htt_wbm_tx_status ts = {0};
|
||||
struct ath11k_dp_htt_wbm_tx_status ts = {};
|
||||
enum hal_wbm_htt_tx_comp_status wbm_status;
|
||||
|
||||
status_desc = desc + HTT_TX_WBM_COMP_STATUS_OFFSET;
|
||||
@@ -551,8 +552,8 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar,
|
||||
struct sk_buff *msdu,
|
||||
struct hal_tx_status *ts)
|
||||
{
|
||||
struct ieee80211_tx_status status = { 0 };
|
||||
struct ieee80211_rate_status status_rate = { 0 };
|
||||
struct ieee80211_tx_status status = {};
|
||||
struct ieee80211_rate_status status_rate = {};
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct ieee80211_tx_info *info;
|
||||
struct ath11k_skb_cb *skb_cb;
|
||||
@@ -690,7 +691,7 @@ void ath11k_dp_tx_completion_handler(struct ath11k_base *ab, int ring_id)
|
||||
int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;
|
||||
struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];
|
||||
struct sk_buff *msdu;
|
||||
struct hal_tx_status ts = { 0 };
|
||||
struct hal_tx_status ts = {};
|
||||
struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];
|
||||
u32 *desc;
|
||||
u32 msdu_id;
|
||||
@@ -1187,7 +1188,7 @@ int ath11k_dp_tx_htt_monitor_mode_ring_config(struct ath11k *ar, bool reset)
|
||||
{
|
||||
struct ath11k_pdev_dp *dp = &ar->dp;
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
int ret = 0, ring_id = 0, i;
|
||||
|
||||
if (ab->hw_params.full_monitor_mode) {
|
||||
|
||||
@@ -601,7 +601,7 @@ u32 ath11k_hal_ce_dst_status_get_length(void *buf)
|
||||
struct hal_ce_srng_dst_status_desc *desc = buf;
|
||||
u32 len;
|
||||
|
||||
len = FIELD_GET(HAL_CE_DST_STATUS_DESC_FLAGS_LEN, READ_ONCE(desc->flags));
|
||||
len = FIELD_GET(HAL_CE_DST_STATUS_DESC_FLAGS_LEN, desc->flags);
|
||||
desc->flags &= ~HAL_CE_DST_STATUS_DESC_FLAGS_LEN;
|
||||
|
||||
return len;
|
||||
@@ -825,13 +825,23 @@ u32 *ath11k_hal_srng_src_peek(struct ath11k_base *ab, struct hal_srng *srng)
|
||||
|
||||
void ath11k_hal_srng_access_begin(struct ath11k_base *ab, struct hal_srng *srng)
|
||||
{
|
||||
u32 hp;
|
||||
|
||||
lockdep_assert_held(&srng->lock);
|
||||
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
|
||||
srng->u.src_ring.cached_tp =
|
||||
*(volatile u32 *)srng->u.src_ring.tp_addr;
|
||||
} else {
|
||||
srng->u.dst_ring.cached_hp = READ_ONCE(*srng->u.dst_ring.hp_addr);
|
||||
hp = READ_ONCE(*srng->u.dst_ring.hp_addr);
|
||||
|
||||
if (hp != srng->u.dst_ring.cached_hp) {
|
||||
srng->u.dst_ring.cached_hp = hp;
|
||||
/* Make sure descriptor is read after the head
|
||||
* pointer.
|
||||
*/
|
||||
dma_rmb();
|
||||
}
|
||||
|
||||
/* Try to prefetch the next descriptor in the ring */
|
||||
if (srng->flags & HAL_SRNG_FLAGS_CACHED)
|
||||
@@ -846,7 +856,6 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
|
||||
{
|
||||
lockdep_assert_held(&srng->lock);
|
||||
|
||||
/* TODO: See if we need a write memory barrier here */
|
||||
if (srng->flags & HAL_SRNG_FLAGS_LMAC_RING) {
|
||||
/* For LMAC rings, ring pointer updates are done through FW and
|
||||
* hence written to a shared memory location that is read by FW
|
||||
@@ -854,21 +863,37 @@ void ath11k_hal_srng_access_end(struct ath11k_base *ab, struct hal_srng *srng)
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
|
||||
srng->u.src_ring.last_tp =
|
||||
*(volatile u32 *)srng->u.src_ring.tp_addr;
|
||||
*srng->u.src_ring.hp_addr = srng->u.src_ring.hp;
|
||||
/* Make sure descriptor is written before updating the
|
||||
* head pointer.
|
||||
*/
|
||||
dma_wmb();
|
||||
WRITE_ONCE(*srng->u.src_ring.hp_addr, srng->u.src_ring.hp);
|
||||
} else {
|
||||
srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
|
||||
*srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp;
|
||||
/* Make sure descriptor is read before updating the
|
||||
* tail pointer.
|
||||
*/
|
||||
dma_mb();
|
||||
WRITE_ONCE(*srng->u.dst_ring.tp_addr, srng->u.dst_ring.tp);
|
||||
}
|
||||
} else {
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
|
||||
srng->u.src_ring.last_tp =
|
||||
*(volatile u32 *)srng->u.src_ring.tp_addr;
|
||||
/* Assume implementation use an MMIO write accessor
|
||||
* which has the required wmb() so that the descriptor
|
||||
* is written before the updating the head pointer.
|
||||
*/
|
||||
ath11k_hif_write32(ab,
|
||||
(unsigned long)srng->u.src_ring.hp_addr -
|
||||
(unsigned long)ab->mem,
|
||||
srng->u.src_ring.hp);
|
||||
} else {
|
||||
srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
|
||||
/* Make sure descriptor is read before updating the
|
||||
* tail pointer.
|
||||
*/
|
||||
mb();
|
||||
ath11k_hif_write32(ab,
|
||||
(unsigned long)srng->u.dst_ring.tp_addr -
|
||||
(unsigned long)ab->mem,
|
||||
@@ -1348,6 +1373,10 @@ EXPORT_SYMBOL(ath11k_hal_srng_init);
|
||||
void ath11k_hal_srng_deinit(struct ath11k_base *ab)
|
||||
{
|
||||
struct ath11k_hal *hal = &ab->hal;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < HAL_SRNG_RING_ID_MAX; i++)
|
||||
ab->hal.srng_list[i].initialized = 0;
|
||||
|
||||
ath11k_hal_unregister_srng_key(ab);
|
||||
ath11k_hal_free_cont_rdp(ab);
|
||||
|
||||
@@ -497,7 +497,7 @@ static u8 ath11k_htc_get_credit_allocation(struct ath11k_htc *htc,
|
||||
static int ath11k_htc_setup_target_buffer_assignments(struct ath11k_htc *htc)
|
||||
{
|
||||
struct ath11k_htc_svc_tx_credits *serv_entry;
|
||||
u32 svc_id[] = {
|
||||
static const u32 svc_id[] = {
|
||||
ATH11K_HTC_SVC_ID_WMI_CONTROL,
|
||||
ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC1,
|
||||
ATH11K_HTC_SVC_ID_WMI_CONTROL_MAC2,
|
||||
|
||||
@@ -1037,7 +1037,7 @@ static int ath11k_mac_monitor_vdev_create(struct ath11k *ar)
|
||||
struct ath11k_pdev *pdev = ar->pdev;
|
||||
struct vdev_create_params param = {};
|
||||
int bit, ret;
|
||||
u8 tmp_addr[6] = {0};
|
||||
u8 tmp_addr[6] = {};
|
||||
u16 nss;
|
||||
|
||||
lockdep_assert_held(&ar->conf_mutex);
|
||||
@@ -3026,7 +3026,7 @@ static bool ath11k_mac_vif_recalc_sta_he_txbf(struct ath11k *ar,
|
||||
struct ieee80211_sta_he_cap *he_cap)
|
||||
{
|
||||
struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
|
||||
struct ieee80211_he_cap_elem he_cap_elem = {0};
|
||||
struct ieee80211_he_cap_elem he_cap_elem = {};
|
||||
struct ieee80211_sta_he_cap *cap_band = NULL;
|
||||
struct cfg80211_chan_def def;
|
||||
u32 param = WMI_VDEV_PARAM_SET_HEMU_MODE;
|
||||
@@ -3763,7 +3763,7 @@ static void ath11k_mac_op_bss_info_changed(struct ieee80211_hw *hw,
|
||||
ath11k_recalculate_mgmt_rate(ar, vif, &def);
|
||||
|
||||
if (changed & BSS_CHANGED_TWT) {
|
||||
struct wmi_twt_enable_params twt_params = {0};
|
||||
struct wmi_twt_enable_params twt_params = {};
|
||||
|
||||
if (info->twt_requester || info->twt_responder) {
|
||||
ath11k_wmi_fill_default_twt_params(&twt_params);
|
||||
@@ -5323,7 +5323,7 @@ static struct ieee80211_sta_ht_cap
|
||||
ath11k_create_ht_cap(struct ath11k *ar, u32 ar_ht_cap, u32 rate_cap_rx_chainmask)
|
||||
{
|
||||
int i;
|
||||
struct ieee80211_sta_ht_cap ht_cap = {0};
|
||||
struct ieee80211_sta_ht_cap ht_cap = {};
|
||||
u32 ar_vht_cap = ar->pdev->cap.vht_cap;
|
||||
|
||||
if (!(ar_ht_cap & WMI_HT_CAP_ENABLED))
|
||||
@@ -5490,7 +5490,7 @@ static struct ieee80211_sta_vht_cap
|
||||
ath11k_create_vht_cap(struct ath11k *ar, u32 rate_cap_tx_chainmask,
|
||||
u32 rate_cap_rx_chainmask)
|
||||
{
|
||||
struct ieee80211_sta_vht_cap vht_cap = {0};
|
||||
struct ieee80211_sta_vht_cap vht_cap = {};
|
||||
u16 txmcs_map, rxmcs_map;
|
||||
int i;
|
||||
|
||||
@@ -6159,7 +6159,7 @@ void ath11k_mac_drain_tx(struct ath11k *ar)
|
||||
|
||||
static int ath11k_mac_config_mon_status_default(struct ath11k *ar, bool enable)
|
||||
{
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
int i, ret = 0;
|
||||
u32 ring_id;
|
||||
@@ -6678,7 +6678,7 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw,
|
||||
struct ath11k *ar = hw->priv;
|
||||
struct ath11k_base *ab = ar->ab;
|
||||
struct ath11k_vif *arvif = ath11k_vif_to_arvif(vif);
|
||||
struct vdev_create_params vdev_param = {0};
|
||||
struct vdev_create_params vdev_param = {};
|
||||
struct peer_create_params peer_param;
|
||||
u32 param_id, param_value;
|
||||
u16 nss;
|
||||
@@ -8744,9 +8744,9 @@ ath11k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw,
|
||||
arvif->vdev_id, ret);
|
||||
return ret;
|
||||
}
|
||||
ieee80211_iterate_stations_atomic(ar->hw,
|
||||
ath11k_mac_disable_peer_fixed_rate,
|
||||
arvif);
|
||||
ieee80211_iterate_stations_mtx(ar->hw,
|
||||
ath11k_mac_disable_peer_fixed_rate,
|
||||
arvif);
|
||||
} else if (ath11k_mac_bitrate_mask_get_single_nss(ar, arvif, band, mask,
|
||||
&single_nss)) {
|
||||
rate = WMI_FIXED_RATE_NONE;
|
||||
@@ -8813,9 +8813,9 @@ ath11k_mac_op_set_bitrate_mask(struct ieee80211_hw *hw,
|
||||
}
|
||||
|
||||
mutex_lock(&ar->conf_mutex);
|
||||
ieee80211_iterate_stations_atomic(ar->hw,
|
||||
ath11k_mac_disable_peer_fixed_rate,
|
||||
arvif);
|
||||
ieee80211_iterate_stations_mtx(ar->hw,
|
||||
ath11k_mac_disable_peer_fixed_rate,
|
||||
arvif);
|
||||
|
||||
arvif->bitrate_mask = *mask;
|
||||
ieee80211_iterate_stations_atomic(ar->hw,
|
||||
@@ -10421,7 +10421,7 @@ int ath11k_mac_register(struct ath11k_base *ab)
|
||||
struct ath11k_pdev *pdev;
|
||||
int i;
|
||||
int ret;
|
||||
u8 mac_addr[ETH_ALEN] = {0};
|
||||
u8 mac_addr[ETH_ALEN] = {};
|
||||
|
||||
if (test_bit(ATH11K_FLAG_REGISTERED, &ab->dev_flags))
|
||||
return 0;
|
||||
|
||||
@@ -37,7 +37,7 @@ static const struct pci_device_id ath11k_pci_id_table[] = {
|
||||
{ PCI_VDEVICE(QCOM, QCA6390_DEVICE_ID) },
|
||||
{ PCI_VDEVICE(QCOM, WCN6855_DEVICE_ID) },
|
||||
{ PCI_VDEVICE(QCOM, QCN9074_DEVICE_ID) },
|
||||
{0}
|
||||
{}
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(pci, ath11k_pci_id_table);
|
||||
@@ -692,7 +692,7 @@ static void ath11k_pci_coredump_download(struct ath11k_base *ab)
|
||||
struct ath11k_tlv_dump_data *dump_tlv;
|
||||
size_t hdr_len = sizeof(*file_data);
|
||||
void *buf;
|
||||
u32 dump_seg_sz[FW_CRASH_DUMP_TYPE_MAX] = { 0 };
|
||||
u32 dump_seg_sz[FW_CRASH_DUMP_TYPE_MAX] = {};
|
||||
|
||||
ath11k_mhi_coredump(mhi_ctrl, false);
|
||||
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
/*
|
||||
* Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include <linux/relay.h>
|
||||
@@ -205,7 +206,7 @@ static int ath11k_spectral_scan_trigger(struct ath11k *ar)
|
||||
static int ath11k_spectral_scan_config(struct ath11k *ar,
|
||||
enum ath11k_spectral_mode mode)
|
||||
{
|
||||
struct ath11k_wmi_vdev_spectral_conf_param param = { 0 };
|
||||
struct ath11k_wmi_vdev_spectral_conf_param param = {};
|
||||
struct ath11k_vif *arvif;
|
||||
int ret, count;
|
||||
|
||||
|
||||
@@ -7542,7 +7542,7 @@ static void ath11k_vdev_stopped_event(struct ath11k_base *ab, struct sk_buff *sk
|
||||
|
||||
static void ath11k_mgmt_rx_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct mgmt_rx_event_params rx_ev = {0};
|
||||
struct mgmt_rx_event_params rx_ev = {};
|
||||
struct ath11k *ar;
|
||||
struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
|
||||
struct ieee80211_hdr *hdr;
|
||||
@@ -7657,7 +7657,7 @@ exit:
|
||||
|
||||
static void ath11k_mgmt_tx_compl_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_mgmt_tx_compl_event tx_compl_param = {0};
|
||||
struct wmi_mgmt_tx_compl_event tx_compl_param = {};
|
||||
struct ath11k *ar;
|
||||
|
||||
if (ath11k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
|
||||
@@ -7712,7 +7712,7 @@ static struct ath11k *ath11k_get_ar_on_scan_state(struct ath11k_base *ab,
|
||||
static void ath11k_scan_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct ath11k *ar;
|
||||
struct wmi_scan_event scan_ev = {0};
|
||||
struct wmi_scan_event scan_ev = {};
|
||||
|
||||
if (ath11k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
|
||||
ath11k_warn(ab, "failed to extract scan event");
|
||||
@@ -7884,7 +7884,7 @@ static void ath11k_roam_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
|
||||
static void ath11k_chan_info_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_chan_info_event ch_info_ev = {0};
|
||||
struct wmi_chan_info_event ch_info_ev = {};
|
||||
struct ath11k *ar;
|
||||
struct survey_info *survey;
|
||||
int idx;
|
||||
@@ -8031,7 +8031,7 @@ exit:
|
||||
static void ath11k_vdev_install_key_compl_event(struct ath11k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_vdev_install_key_complete_arg install_key_compl = {0};
|
||||
struct wmi_vdev_install_key_complete_arg install_key_compl = {};
|
||||
struct ath11k *ar;
|
||||
|
||||
if (ath11k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
|
||||
@@ -8129,7 +8129,7 @@ static void ath11k_service_available_event(struct ath11k_base *ab, struct sk_buf
|
||||
|
||||
static void ath11k_peer_assoc_conf_event(struct ath11k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};
|
||||
struct wmi_peer_assoc_conf_arg peer_assoc_conf = {};
|
||||
struct ath11k *ar;
|
||||
|
||||
if (ath11k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
|
||||
|
||||
@@ -1022,6 +1022,7 @@ static int ath12k_ahb_probe(struct platform_device *pdev)
|
||||
ab->hif.ops = hif_ops;
|
||||
ab->pdev = pdev;
|
||||
ab->hw_rev = hw_rev;
|
||||
ab->target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;
|
||||
platform_set_drvdata(pdev, ab);
|
||||
ab_ahb = ath12k_ab_to_ahb(ab);
|
||||
ab_ahb->ab = ab;
|
||||
|
||||
@@ -433,9 +433,6 @@ static int ath12k_ce_completed_recv_next(struct ath12k_ce_pipe *pipe,
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* Make sure descriptor is read after the head pointer. */
|
||||
dma_rmb();
|
||||
|
||||
*nbytes = ath12k_hal_ce_dst_status_get_length(desc);
|
||||
|
||||
*skb = pipe->dest_ring->skb[sw_index];
|
||||
@@ -581,7 +578,7 @@ static int ath12k_ce_init_ring(struct ath12k_base *ab,
|
||||
struct ath12k_ce_ring *ce_ring,
|
||||
int ce_id, enum hal_ring_type type)
|
||||
{
|
||||
struct hal_srng_params params = { 0 };
|
||||
struct hal_srng_params params = {};
|
||||
int ret;
|
||||
|
||||
params.ring_base_paddr = ce_ring->base_addr_ce_space;
|
||||
|
||||
@@ -37,6 +37,36 @@ static struct list_head ath12k_hw_group_list = LIST_HEAD_INIT(ath12k_hw_group_li
|
||||
|
||||
static DEFINE_MUTEX(ath12k_hw_group_mutex);
|
||||
|
||||
static const struct
|
||||
ath12k_mem_profile_based_param ath12k_mem_profile_based_param[] = {
|
||||
[ATH12K_QMI_MEMORY_MODE_DEFAULT] = {
|
||||
.num_vdevs = 17,
|
||||
.max_client_single = 512,
|
||||
.max_client_dbs = 128,
|
||||
.max_client_dbs_sbs = 128,
|
||||
.dp_params = {
|
||||
.tx_comp_ring_size = 32768,
|
||||
.rxdma_monitor_buf_ring_size = 4096,
|
||||
.rxdma_monitor_dst_ring_size = 8092,
|
||||
.num_pool_tx_desc = 32768,
|
||||
.rx_desc_count = 12288,
|
||||
},
|
||||
},
|
||||
[ATH12K_QMI_MEMORY_MODE_LOW_512_M] = {
|
||||
.num_vdevs = 9,
|
||||
.max_client_single = 128,
|
||||
.max_client_dbs = 64,
|
||||
.max_client_dbs_sbs = 64,
|
||||
.dp_params = {
|
||||
.tx_comp_ring_size = 16384,
|
||||
.rxdma_monitor_buf_ring_size = 256,
|
||||
.rxdma_monitor_dst_ring_size = 512,
|
||||
.num_pool_tx_desc = 16384,
|
||||
.rx_desc_count = 6144,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static int ath12k_core_rfkill_config(struct ath12k_base *ab)
|
||||
{
|
||||
struct ath12k *ar;
|
||||
@@ -188,7 +218,7 @@ static int __ath12k_core_create_board_name(struct ath12k_base *ab, char *name,
|
||||
bool bus_type_mode, bool with_default)
|
||||
{
|
||||
/* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */
|
||||
char variant[9 + ATH12K_QMI_BDF_EXT_STR_LENGTH] = { 0 };
|
||||
char variant[9 + ATH12K_QMI_BDF_EXT_STR_LENGTH] = {};
|
||||
|
||||
if (with_variant && ab->qmi.target.bdf_ext[0] != '\0')
|
||||
scnprintf(variant, sizeof(variant), ",variant=%s",
|
||||
@@ -593,28 +623,15 @@ exit:
|
||||
u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab)
|
||||
{
|
||||
if (ab->num_radios == 2)
|
||||
return TARGET_NUM_STATIONS_DBS;
|
||||
else if (ab->num_radios == 3)
|
||||
return TARGET_NUM_PEERS_PDEV_DBS_SBS;
|
||||
return TARGET_NUM_STATIONS_SINGLE;
|
||||
return TARGET_NUM_STATIONS(ab, DBS);
|
||||
if (ab->num_radios == 3)
|
||||
return TARGET_NUM_STATIONS(ab, DBS_SBS);
|
||||
return TARGET_NUM_STATIONS(ab, SINGLE);
|
||||
}
|
||||
|
||||
u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab)
|
||||
{
|
||||
if (ab->num_radios == 2)
|
||||
return TARGET_NUM_PEERS_PDEV_DBS;
|
||||
else if (ab->num_radios == 3)
|
||||
return TARGET_NUM_PEERS_PDEV_DBS_SBS;
|
||||
return TARGET_NUM_PEERS_PDEV_SINGLE;
|
||||
}
|
||||
|
||||
u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab)
|
||||
{
|
||||
if (ab->num_radios == 2)
|
||||
return TARGET_NUM_TIDS(DBS);
|
||||
else if (ab->num_radios == 3)
|
||||
return TARGET_NUM_TIDS(DBS_SBS);
|
||||
return TARGET_NUM_TIDS(SINGLE);
|
||||
return ath12k_core_get_max_station_per_radio(ab) + TARGET_NUM_VDEVS(ab);
|
||||
}
|
||||
|
||||
struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab,
|
||||
@@ -1332,7 +1349,7 @@ exit:
|
||||
|
||||
static int ath12k_core_reconfigure_on_crash(struct ath12k_base *ab)
|
||||
{
|
||||
int ret;
|
||||
int ret, total_vdev;
|
||||
|
||||
mutex_lock(&ab->core_lock);
|
||||
ath12k_dp_pdev_free(ab);
|
||||
@@ -1343,8 +1360,8 @@ static int ath12k_core_reconfigure_on_crash(struct ath12k_base *ab)
|
||||
|
||||
ath12k_dp_free(ab);
|
||||
ath12k_hal_srng_deinit(ab);
|
||||
|
||||
ab->free_vdev_map = (1LL << (ab->num_radios * TARGET_NUM_VDEVS)) - 1;
|
||||
total_vdev = ab->num_radios * TARGET_NUM_VDEVS(ab);
|
||||
ab->free_vdev_map = (1LL << total_vdev) - 1;
|
||||
|
||||
ret = ath12k_hal_srng_init(ab);
|
||||
if (ret)
|
||||
@@ -1475,7 +1492,7 @@ static void ath12k_core_pre_reconfigure_recovery(struct ath12k_base *ab)
|
||||
complete(&ar->vdev_setup_done);
|
||||
complete(&ar->vdev_delete_done);
|
||||
complete(&ar->bss_survey_done);
|
||||
complete(&ar->regd_update_completed);
|
||||
complete_all(&ar->regd_update_completed);
|
||||
|
||||
wake_up(&ar->dp.tx_empty_waitq);
|
||||
idr_for_each(&ar->txmgmt_idr,
|
||||
@@ -1711,8 +1728,23 @@ static void ath12k_core_reset(struct work_struct *work)
|
||||
mutex_unlock(&ag->mutex);
|
||||
}
|
||||
|
||||
enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab)
|
||||
{
|
||||
unsigned long total_ram;
|
||||
struct sysinfo si;
|
||||
|
||||
si_meminfo(&si);
|
||||
total_ram = si.totalram * si.mem_unit;
|
||||
|
||||
if (total_ram < SZ_512M)
|
||||
return ATH12K_QMI_MEMORY_MODE_LOW_512_M;
|
||||
|
||||
return ATH12K_QMI_MEMORY_MODE_DEFAULT;
|
||||
}
|
||||
|
||||
int ath12k_core_pre_init(struct ath12k_base *ab)
|
||||
{
|
||||
const struct ath12k_mem_profile_based_param *param;
|
||||
int ret;
|
||||
|
||||
ret = ath12k_hw_init(ab);
|
||||
@@ -1721,6 +1753,8 @@ int ath12k_core_pre_init(struct ath12k_base *ab)
|
||||
return ret;
|
||||
}
|
||||
|
||||
param = &ath12k_mem_profile_based_param[ab->target_mem_mode];
|
||||
ab->profile_param = param;
|
||||
ath12k_fw_map(ab);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -116,6 +116,7 @@ static inline u64 ath12k_le32hilo_to_u64(__le32 hi, __le32 lo)
|
||||
enum ath12k_skb_flags {
|
||||
ATH12K_SKB_HW_80211_ENCAP = BIT(0),
|
||||
ATH12K_SKB_CIPHER_SET = BIT(1),
|
||||
ATH12K_SKB_MLO_STA = BIT(2),
|
||||
};
|
||||
|
||||
struct ath12k_skb_cb {
|
||||
@@ -316,6 +317,7 @@ struct ath12k_link_vif {
|
||||
|
||||
int bank_id;
|
||||
u8 vdev_id_check_en;
|
||||
bool beacon_prot;
|
||||
|
||||
struct wmi_wmm_params_all_arg wmm_params;
|
||||
struct list_head list;
|
||||
@@ -349,6 +351,7 @@ struct ath12k_link_vif {
|
||||
bool group_key_valid;
|
||||
struct wmi_vdev_install_key_arg group_key;
|
||||
bool pairwise_key_done;
|
||||
u16 num_stations;
|
||||
};
|
||||
|
||||
struct ath12k_vif {
|
||||
@@ -563,6 +566,8 @@ struct ath12k_link_sta {
|
||||
|
||||
/* for firmware use only */
|
||||
u8 link_idx;
|
||||
u32 tx_retry_failed;
|
||||
u32 tx_retry_count;
|
||||
};
|
||||
|
||||
struct ath12k_reoq_buf {
|
||||
@@ -674,6 +679,15 @@ struct ath12k_per_peer_tx_stats {
|
||||
bool is_ampdu;
|
||||
};
|
||||
|
||||
struct ath12k_pdev_rssi_offsets {
|
||||
s32 temp_offset;
|
||||
s8 min_nf_dbm;
|
||||
/* Cache the sum here to avoid calculating it every time in hot path
|
||||
* noise_floor = min_nf_dbm + temp_offset
|
||||
*/
|
||||
s32 noise_floor;
|
||||
};
|
||||
|
||||
#define ATH12K_FLUSH_TIMEOUT (5 * HZ)
|
||||
#define ATH12K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
|
||||
|
||||
@@ -827,6 +841,7 @@ struct ath12k {
|
||||
unsigned long last_tx_power_update;
|
||||
|
||||
s8 max_allowed_tx_power;
|
||||
struct ath12k_pdev_rssi_offsets rssi_info;
|
||||
};
|
||||
|
||||
struct ath12k_hw {
|
||||
@@ -884,6 +899,8 @@ struct ath12k_pdev_cap {
|
||||
struct ath12k_band_cap band[NUM_NL80211_BANDS];
|
||||
u32 eml_cap;
|
||||
u32 mld_cap;
|
||||
bool nss_ratio_enabled;
|
||||
u8 nss_ratio_info;
|
||||
};
|
||||
|
||||
struct mlo_timestamp {
|
||||
@@ -995,6 +1012,22 @@ struct ath12k_wsi_info {
|
||||
u32 hw_link_id_base;
|
||||
};
|
||||
|
||||
struct ath12k_dp_profile_params {
|
||||
u32 tx_comp_ring_size;
|
||||
u32 rxdma_monitor_buf_ring_size;
|
||||
u32 rxdma_monitor_dst_ring_size;
|
||||
u32 num_pool_tx_desc;
|
||||
u32 rx_desc_count;
|
||||
};
|
||||
|
||||
struct ath12k_mem_profile_based_param {
|
||||
u32 num_vdevs;
|
||||
u32 max_client_single;
|
||||
u32 max_client_dbs;
|
||||
u32 max_client_dbs_sbs;
|
||||
struct ath12k_dp_profile_params dp_params;
|
||||
};
|
||||
|
||||
/* Master structure to hold the hw data which may be used in core module */
|
||||
struct ath12k_base {
|
||||
enum ath12k_hw_rev hw_rev;
|
||||
@@ -1198,6 +1231,8 @@ struct ath12k_base {
|
||||
struct ath12k_reg_freq reg_freq_2ghz;
|
||||
struct ath12k_reg_freq reg_freq_5ghz;
|
||||
struct ath12k_reg_freq reg_freq_6ghz;
|
||||
const struct ath12k_mem_profile_based_param *profile_param;
|
||||
enum ath12k_qmi_mem_mode target_mem_mode;
|
||||
|
||||
/* must be last */
|
||||
u8 drv_priv[] __aligned(sizeof(void *));
|
||||
@@ -1324,7 +1359,6 @@ const struct firmware *ath12k_core_firmware_request(struct ath12k_base *ab,
|
||||
const char *filename);
|
||||
u32 ath12k_core_get_max_station_per_radio(struct ath12k_base *ab);
|
||||
u32 ath12k_core_get_max_peers_per_radio(struct ath12k_base *ab);
|
||||
u32 ath12k_core_get_max_num_tids(struct ath12k_base *ab);
|
||||
|
||||
void ath12k_core_hw_group_set_mlo_capable(struct ath12k_hw_group *ag);
|
||||
void ath12k_fw_stats_init(struct ath12k *ar);
|
||||
@@ -1333,6 +1367,7 @@ void ath12k_fw_stats_free(struct ath12k_fw_stats *stats);
|
||||
void ath12k_fw_stats_reset(struct ath12k *ar);
|
||||
struct reserved_mem *ath12k_core_get_reserved_mem(struct ath12k_base *ab,
|
||||
int index);
|
||||
enum ath12k_qmi_mem_mode ath12k_core_get_memory_mode(struct ath12k_base *ab);
|
||||
|
||||
static inline const char *ath12k_scan_state_str(enum ath12k_scan_state state)
|
||||
{
|
||||
@@ -1467,4 +1502,11 @@ static inline struct ath12k_base *ath12k_ag_to_ab(struct ath12k_hw_group *ag,
|
||||
return ag->ab[device_id];
|
||||
}
|
||||
|
||||
static inline s32 ath12k_pdev_get_noise_floor(struct ath12k *ar)
|
||||
{
|
||||
lockdep_assert_held(&ar->data_lock);
|
||||
|
||||
return ar->rssi_info.noise_floor;
|
||||
}
|
||||
|
||||
#endif /* _CORE_H_ */
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
/*
|
||||
* Copyright (c) 2019-2021 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
|
||||
*/
|
||||
|
||||
#include "core.h"
|
||||
@@ -117,7 +118,7 @@ int ath12k_dbring_wmi_cfg_setup(struct ath12k *ar,
|
||||
struct ath12k_dbring *ring,
|
||||
enum wmi_direct_buffer_module id)
|
||||
{
|
||||
struct ath12k_wmi_pdev_dma_ring_cfg_arg arg = {0};
|
||||
struct ath12k_wmi_pdev_dma_ring_cfg_arg arg = {};
|
||||
int ret;
|
||||
|
||||
if (id >= WMI_DIRECT_BUF_MAX)
|
||||
|
||||
@@ -52,7 +52,7 @@ ath12k_write_simulate_fw_crash(struct file *file,
|
||||
struct ath12k_base *ab = file->private_data;
|
||||
struct ath12k_pdev *pdev;
|
||||
struct ath12k *ar = NULL;
|
||||
char buf[32] = {0};
|
||||
char buf[32] = {};
|
||||
int i, ret;
|
||||
ssize_t rc;
|
||||
|
||||
@@ -816,7 +816,7 @@ static ssize_t ath12k_write_extd_rx_stats(struct file *file,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
struct ath12k *ar = file->private_data;
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
u32 ring_id, rx_filter = 0;
|
||||
bool enable;
|
||||
int ret, i;
|
||||
@@ -1217,7 +1217,7 @@ void ath12k_debugfs_pdev_create(struct ath12k_base *ab)
|
||||
void ath12k_debugfs_soc_create(struct ath12k_base *ab)
|
||||
{
|
||||
bool dput_needed;
|
||||
char soc_name[64] = { 0 };
|
||||
char soc_name[64] = {};
|
||||
struct dentry *debugfs_ath12k;
|
||||
|
||||
debugfs_ath12k = debugfs_lookup("ath12k", NULL);
|
||||
@@ -1470,7 +1470,7 @@ void ath12k_debugfs_register(struct ath12k *ar)
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct ieee80211_hw *hw = ar->ah->hw;
|
||||
char pdev_name[5];
|
||||
char buf[100] = {0};
|
||||
char buf[100] = {};
|
||||
|
||||
scnprintf(pdev_name, sizeof(pdev_name), "%s%d", "mac", ar->pdev_idx);
|
||||
|
||||
|
||||
@@ -2024,7 +2024,7 @@ ath12k_htt_print_stats_string_tlv(const void *tag_buf, u16 tag_len,
|
||||
u8 i;
|
||||
u16 index = 0;
|
||||
u32 datum;
|
||||
char data[ATH12K_HTT_MAX_STRING_LEN] = {0};
|
||||
char data[ATH12K_HTT_MAX_STRING_LEN] = {};
|
||||
|
||||
tag_len = tag_len >> 2;
|
||||
|
||||
@@ -3081,7 +3081,7 @@ ath12k_htt_print_ul_mumimo_trig_stats(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_rx_ul_mumimo_trig_stats_tlv *htt_stats_buf = tag_buf;
|
||||
char str_buf[ATH12K_HTT_MAX_STRING_LEN] = {0};
|
||||
char str_buf[ATH12K_HTT_MAX_STRING_LEN] = {};
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
@@ -3642,7 +3642,7 @@ ath12k_htt_print_dlpager_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
u8 *buf = stats_req->buf;
|
||||
u8 pg_locked;
|
||||
u8 pg_unlock;
|
||||
char str_buf[ATH12K_HTT_MAX_STRING_LEN] = {0};
|
||||
char str_buf[ATH12K_HTT_MAX_STRING_LEN] = {};
|
||||
|
||||
if (tag_len < sizeof(*stat_buf))
|
||||
return;
|
||||
@@ -4720,7 +4720,38 @@ ath12k_htt_print_tx_pdev_rate_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
len += print_array_to_buf(buf, len, "tx_pream", htt_stats_buf->tx_pream,
|
||||
ATH12K_HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES, "\n");
|
||||
len += print_array_to_buf(buf, len, "tx_dcm", htt_stats_buf->tx_dcm,
|
||||
ATH12K_HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS, "\n");
|
||||
ATH12K_HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS, "\n\n");
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_histogram_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_tx_histogram_stats_tlv *stats_buf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
|
||||
if (tag_len < sizeof(*stats_buf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "low_latency_rate_cnt = %u\n",
|
||||
le32_to_cpu(stats_buf->low_latency_rate_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "su_burst_rate_drop_cnt = %u\n",
|
||||
le32_to_cpu(stats_buf->su_burst_rate_drop_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "su_burst_rate_drop_fail_cnt = %u\n",
|
||||
le32_to_cpu(stats_buf->su_burst_rate_drop_fail_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rate_retry_mcs_drop_cnt = %u\n",
|
||||
le32_to_cpu(stats_buf->rate_retry_mcs_drop_cnt));
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "\nPER_HISTOGRAM_STATS\n");
|
||||
len += print_array_to_buf(buf, len, "mcs_drop_rate", stats_buf->mcs_drop_rate,
|
||||
ATH12K_HTT_TX_PDEV_STATS_NUM_MCS_DROP_COUNTERS, "\n");
|
||||
len += print_array_to_buf(buf, len, "per_histogram_count",
|
||||
stats_buf->per_histogram_cnt,
|
||||
ATH12K_HTT_TX_PDEV_STATS_NUM_PER_COUNTERS, "\n\n");
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
@@ -5015,6 +5046,497 @@ ath12k_htt_print_rx_pdev_rate_ext_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_pdev_tdma_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_pdev_tdma_stats_tlv *htt_stats_buf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
u32 mac_id_word;
|
||||
|
||||
if (tag_len < sizeof(*htt_stats_buf))
|
||||
return;
|
||||
|
||||
mac_id_word = le32_to_cpu(htt_stats_buf->mac_id__word);
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_TDMA_STATS_TLV:\n");
|
||||
len += scnprintf(buf + len, buf_len - len, "mac_id = %u\n",
|
||||
u32_get_bits(mac_id_word, ATH12K_HTT_STATS_MAC_ID));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_tdma_active_schedules = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tdma_active_schedules));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_tdma_reserved_schedules = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tdma_reserved_schedules));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"num_tdma_restricted_schedules = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tdma_restricted_schedules));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"num_tdma_unconfigured_schedules = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tdma_unconfigured_schedules));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_tdma_slot_switches = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tdma_slot_switches));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_tdma_edca_switches = %u\n\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tdma_edca_switches));
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_mlo_sched_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_mlo_sched_stats_tlv *stats_buf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
|
||||
if (tag_len < sizeof(*stats_buf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_STATS_MLO_SCHED_STATS:\n");
|
||||
len += scnprintf(buf + len, buf_len - len, "num_sec_link_sched = %u\n",
|
||||
le32_to_cpu(stats_buf->pref_link_num_sec_link_sched));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_pref_link_timeout = %u\n",
|
||||
le32_to_cpu(stats_buf->pref_link_num_pref_link_timeout));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_pref_link_sch_delay_ipc = %u\n",
|
||||
le32_to_cpu(stats_buf->pref_link_num_pref_link_sch_delay_ipc));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_pref_link_timeout_ipc = %u\n\n",
|
||||
le32_to_cpu(stats_buf->pref_link_num_pref_link_timeout_ipc));
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_mlo_ipc_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_pdev_mlo_ipc_stats_tlv *stats_buf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
u8 i, j;
|
||||
|
||||
if (tag_len < sizeof(*stats_buf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_STATS_MLO_IPC_STATS:\n");
|
||||
for (i = 0; i < ATH12K_HTT_HWMLO_MAX_LINKS; i++) {
|
||||
len += scnprintf(buf + len, buf_len - len, "src_link: %u\n", i);
|
||||
for (j = 0; j < ATH12K_HTT_MLO_MAX_IPC_RINGS; j++)
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"mlo_ipc_ring_full_cnt[%u]: %u\n", j,
|
||||
le32_to_cpu(stats_buf->mlo_ipc_ring_cnt[i][j]));
|
||||
len += scnprintf(buf + len, buf_len - len, "\n");
|
||||
}
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_pdev_rtt_resp_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_stats_pdev_rtt_resp_stats_tlv *sbuf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
|
||||
if (tag_len < sizeof(*sbuf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_RTT_RESP_STATS_TLV:\n");
|
||||
len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",
|
||||
le32_to_cpu(sbuf->pdev_id));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11mc_ftm_suc = %u\n",
|
||||
le32_to_cpu(sbuf->tx_11mc_ftm_suc));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11mc_ftm_suc_retry = %u\n",
|
||||
le32_to_cpu(sbuf->tx_11mc_ftm_suc_retry));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11mc_ftm_fail = %u\n",
|
||||
le32_to_cpu(sbuf->tx_11mc_ftm_fail));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11mc_ftmr_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->rx_11mc_ftmr_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11mc_ftmr_dup_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->rx_11mc_ftmr_dup_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11mc_iftmr_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->rx_11mc_iftmr_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11mc_iftmr_dup_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->rx_11mc_iftmr_dup_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"ftmr_drop_11mc_resp_role_not_enabled_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->ftmr_drop_11mc_resp_role_not_enabled_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11az_ftm_successful = %u\n",
|
||||
le32_to_cpu(sbuf->tx_11az_ftm_successful));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11az_ftm_failed = %u\n",
|
||||
le32_to_cpu(sbuf->tx_11az_ftm_failed));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11az_ftmr_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->rx_11az_ftmr_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11az_ftmr_dup_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->rx_11az_ftmr_dup_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11az_iftmr_dup_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->rx_11az_iftmr_dup_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"initiator_active_responder_rejected_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->initiator_active_responder_rejected_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "malformed_ftmr = %u\n",
|
||||
le32_to_cpu(sbuf->malformed_ftmr));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"ftmr_drop_ntb_resp_role_not_enabled_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->ftmr_drop_ntb_resp_role_not_enabled_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"ftmr_drop_tb_resp_role_not_enabled_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->ftmr_drop_tb_resp_role_not_enabled_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "responder_alloc_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->responder_alloc_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "responder_alloc_failure = %u\n",
|
||||
le32_to_cpu(sbuf->responder_alloc_failure));
|
||||
len += scnprintf(buf + len, buf_len - len, "responder_terminate_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->responder_terminate_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "active_rsta_open = %u\n",
|
||||
le32_to_cpu(sbuf->active_rsta_open));
|
||||
len += scnprintf(buf + len, buf_len - len, "active_rsta_mac = %u\n",
|
||||
le32_to_cpu(sbuf->active_rsta_mac));
|
||||
len += scnprintf(buf + len, buf_len - len, "active_rsta_mac_phy = %u\n",
|
||||
le32_to_cpu(sbuf->active_rsta_mac_phy));
|
||||
len += scnprintf(buf + len, buf_len - len, "pn_check_failure_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pn_check_failure_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_assoc_ranging_peers = %u\n",
|
||||
le32_to_cpu(sbuf->num_assoc_ranging_peers));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_unassoc_ranging_peers = %u\n",
|
||||
le32_to_cpu(sbuf->num_unassoc_ranging_peers));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m1_auth_recv_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_m1_auth_recv_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m1_auth_drop_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_m1_auth_drop_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m2_auth_recv_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_m2_auth_recv_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m2_auth_tx_fail_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_m2_auth_tx_fail_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m3_auth_recv_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_m3_auth_recv_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m3_auth_drop_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_m3_auth_drop_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_peer_create_request_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_peer_create_request_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_peer_created_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_peer_created_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_peer_create_timeout_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->pasn_peer_create_timeout_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"sec_ranging_not_supported_mfp_not_setup = %u\n",
|
||||
le32_to_cpu(sbuf->sec_ranging_not_supported_mfp_not_setup));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"non_sec_ranging_discarded_for_assoc_peer_with_mfpr_set = %u\n",
|
||||
le32_to_cpu(sbuf->non_sec_ranging_discarded_for_assoc_peer));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"open_ranging_discarded_with_URNM_MFPR_set_for_pasn_peer = %u\n",
|
||||
le32_to_cpu(sbuf->open_ranging_discarded_set_for_pasn_peer));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"unassoc_non_pasn_ranging_not_supported_with_URNM_MFPR = %u\n",
|
||||
le32_to_cpu(sbuf->unassoc_non_pasn_ranging_not_supported));
|
||||
len += scnprintf(buf + len, buf_len - len, "invalid_ftm_request_params = %u\n",
|
||||
le32_to_cpu(sbuf->invalid_ftm_request_params));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"requested_bw_format_not_supported = %u\n",
|
||||
le32_to_cpu(sbuf->requested_bw_format_not_supported));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"ntb_unsec_unassoc_mode_ranging_peer_alloc_failed = %u\n",
|
||||
le32_to_cpu(sbuf->ntb_unsec_unassoc_ranging_peer_alloc_failed));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"tb_unassoc_unsec_mode_pasn_peer_creation_failed = %u\n",
|
||||
le32_to_cpu(sbuf->tb_unassoc_unsec_pasn_peer_creation_failed));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"num_ranging_sequences_processed = %u\n",
|
||||
le32_to_cpu(sbuf->num_ranging_sequences_processed));
|
||||
len += scnprintf(buf + len, buf_len - len, "ndp_rx_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->ndp_rx_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_req_bw_20_MHz = %u\n",
|
||||
le32_to_cpu(sbuf->num_req_bw_20_mhz));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_req_bw_40_MHz = %u\n",
|
||||
le32_to_cpu(sbuf->num_req_bw_40_mhz));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_req_bw_80_MHz = %u\n",
|
||||
le32_to_cpu(sbuf->num_req_bw_80_mhz));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_req_bw_160_MHz = %u\n",
|
||||
le32_to_cpu(sbuf->num_req_bw_160_mhz));
|
||||
len += scnprintf(buf + len, buf_len - len, "ntb_tx_ndp = %u\n",
|
||||
le32_to_cpu(sbuf->ntb_tx_ndp));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_ntb_ranging_NDPAs_recv = %u\n",
|
||||
le32_to_cpu(sbuf->num_ntb_ranging_ndpas_recv));
|
||||
len += scnprintf(buf + len, buf_len - len, "recv_lmr = %u\n",
|
||||
le32_to_cpu(sbuf->recv_lmr));
|
||||
len += scnprintf(buf + len, buf_len - len, "invalid_ftmr_cnt = %u\n",
|
||||
le32_to_cpu(sbuf->invalid_ftmr_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "max_time_bw_meas_exp_cnt = %u\n\n",
|
||||
le32_to_cpu(sbuf->max_time_bw_meas_exp_cnt));
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_pdev_rtt_init_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_stats_pdev_rtt_init_stats_tlv *htt_stats_buf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf, i;
|
||||
__le32 sch_fail;
|
||||
|
||||
if (tag_len < sizeof(*htt_stats_buf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_PDEV_RTT_INIT_STATS_TLV:\n");
|
||||
len += scnprintf(buf + len, buf_len - len, "pdev_id = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pdev_id));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11mc_ftmr_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tx_11mc_ftmr_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11mc_ftmr_fail = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tx_11mc_ftmr_fail));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11mc_ftmr_suc_retry = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tx_11mc_ftmr_suc_retry));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11mc_ftm_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->rx_11mc_ftm_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rx_11az_ftm_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->rx_11az_ftm_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "initiator_terminate_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->initiator_terminate_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_meas_req_count = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tx_meas_req_count));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11az_ftmr_start = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tx_11az_ftmr_start));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11az_ftmr_stop = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tx_11az_ftmr_stop));
|
||||
len += scnprintf(buf + len, buf_len - len, "tx_11az_ftmr_fail = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tx_11az_ftmr_fail));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"ftmr_tx_failed_null_11az_peer = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ftmr_tx_failed_null_11az_peer));
|
||||
len += scnprintf(buf + len, buf_len - len, "ftmr_retry_timeout = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ftmr_retry_timeout));
|
||||
len += scnprintf(buf + len, buf_len - len, "ftm_parse_failure = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ftm_parse_failure));
|
||||
len += scnprintf(buf + len, buf_len - len, "incompatible_ftm_params = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->incompatible_ftm_params));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"ranging_negotiation_successful_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ranging_negotiation_successful_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "active_ista = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->active_ista));
|
||||
len += scnprintf(buf + len, buf_len - len, "init_role_not_enabled = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->init_role_not_enabled));
|
||||
len += scnprintf(buf + len, buf_len - len, "invalid_preamble = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->invalid_preamble));
|
||||
len += scnprintf(buf + len, buf_len - len, "invalid_chan_bw_format = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->invalid_chan_bw_format));
|
||||
len += scnprintf(buf + len, buf_len - len, "mgmt_buff_alloc_fail_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->mgmt_buff_alloc_fail_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "sec_ranging_req_in_open_mode = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->sec_ranging_req_in_open_mode));
|
||||
len += scnprintf(buf + len, buf_len - len, "max_time_bw_meas_exp_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->max_time_bw_meas_exp_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_tb_ranging_requests = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tb_ranging_requests));
|
||||
len += scnprintf(buf + len, buf_len - len, "tb_meas_duration_expiry_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tb_meas_duration_expiry_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "ntbr_triggered_successfully = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ntbr_triggered_successfully));
|
||||
len += scnprintf(buf + len, buf_len - len, "ntbr_trigger_failed = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ntbr_trigger_failed));
|
||||
len += scnprintf(buf + len, buf_len - len, "invalid_or_no_vreg_idx = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->invalid_or_no_vreg_idx));
|
||||
len += scnprintf(buf + len, buf_len - len, "set_vreg_params_failed = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->set_vreg_params_failed));
|
||||
len += scnprintf(buf + len, buf_len - len, "sac_mismatch = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->sac_mismatch));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m1_auth_recv_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_m1_auth_recv_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m1_auth_tx_fail_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_m1_auth_tx_fail_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m2_auth_recv_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_m2_auth_recv_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m2_auth_drop_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_m2_auth_drop_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m3_auth_recv_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_m3_auth_recv_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_m3_auth_tx_fail_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_m3_auth_tx_fail_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_peer_create_request_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_peer_create_request_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_peer_created_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_peer_created_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "pasn_peer_create_timeout_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->pasn_peer_create_timeout_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "ntbr_ndpa_failed = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ntbr_ndpa_failed));
|
||||
len += scnprintf(buf + len, buf_len - len, "ntbr_sequence_successful = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ntbr_sequence_successful));
|
||||
len += scnprintf(buf + len, buf_len - len, "ntbr_ndp_failed = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ntbr_ndp_failed));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_tb_ranging_NDPAs_recv = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_tb_ranging_ndpas_recv));
|
||||
len += scnprintf(buf + len, buf_len - len, "ndp_rx_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ndp_rx_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "num_trigger_frames_received = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->num_trigger_frames_received));
|
||||
for (i = 0; i < (ATH12K_HTT_SCH_CMD_STATUS_CNT - 1); i++)
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"num_sch_cmd_status_%d = %u\n", i,
|
||||
le32_to_cpu(htt_stats_buf->sch_cmd_status_cnts[i]));
|
||||
sch_fail = htt_stats_buf->sch_cmd_status_cnts[ATH12K_HTT_SCH_CMD_STATUS_CNT - 1];
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"num_sch_cmd_status_other_failure = %u\n",
|
||||
le32_to_cpu(sch_fail));
|
||||
len += scnprintf(buf + len, buf_len - len, "lmr_timeout = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->lmr_timeout));
|
||||
len += scnprintf(buf + len, buf_len - len, "lmr_recv = %u\n\n",
|
||||
le32_to_cpu(htt_stats_buf->lmr_recv));
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_pdev_rtt_hw_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_stats_pdev_rtt_hw_stats_tlv *htt_stats_buf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf;
|
||||
|
||||
if (tag_len < sizeof(*htt_stats_buf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len, "HTT_STATS_PDEV_RTT_HW_STATS_TAG:\n");
|
||||
len += scnprintf(buf + len, buf_len - len, "ista_ranging_ndpa_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ista_ranging_ndpa_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "ista_ranging_ndp_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ista_ranging_ndp_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "ista_ranging_i2r_lmr_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->ista_ranging_i2r_lmr_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rtsa_ranging_resp_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->rtsa_ranging_resp_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rtsa_ranging_ndp_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->rtsa_ranging_ndp_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "rsta_ranging_lmr_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->rsta_ranging_lmr_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "tb_ranging_cts2s_rcvd_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tb_ranging_cts2s_rcvd_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "tb_ranging_ndp_rcvd_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tb_ranging_ndp_rcvd_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len, "tb_ranging_lmr_rcvd_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tb_ranging_lmr_rcvd_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"tb_ranging_tf_poll_resp_sent_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tb_ranging_tf_poll_resp_sent_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"tb_ranging_tf_sound_resp_sent_cnt = %u\n",
|
||||
le32_to_cpu(htt_stats_buf->tb_ranging_tf_sound_resp_sent_cnt));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"tb_ranging_tf_report_resp_sent_cnt = %u\n\n",
|
||||
le32_to_cpu(htt_stats_buf->tb_ranging_tf_report_resp_sent_cnt));
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_pdev_rtt_tbr_selfgen_queued_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *req)
|
||||
{
|
||||
const struct ath12k_htt_stats_pdev_rtt_tbr_tlv *sbuf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = req->buf_len;
|
||||
u8 *buf = req->buf;
|
||||
|
||||
if (tag_len < sizeof(*sbuf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG:\n");
|
||||
len += scnprintf(buf + len, buf_len - len, "SU poll = %u\n",
|
||||
le32_to_cpu(sbuf->su_ftype[ATH12K_HTT_FTYPE_TF_POLL]));
|
||||
len += scnprintf(buf + len, buf_len - len, "SU sound = %u\n",
|
||||
le32_to_cpu(sbuf->su_ftype[ATH12K_HTT_FTYPE_TF_SOUND]));
|
||||
len += scnprintf(buf + len, buf_len - len, "SU NDPA = %u\n",
|
||||
le32_to_cpu(sbuf->su_ftype[ATH12K_HTT_FTYPE_TBR_NDPA]));
|
||||
len += scnprintf(buf + len, buf_len - len, "SU NDP = %u\n",
|
||||
le32_to_cpu(sbuf->su_ftype[ATH12K_HTT_FTYPE_TBR_NDP]));
|
||||
len += scnprintf(buf + len, buf_len - len, "SU LMR = %u\n",
|
||||
le32_to_cpu(sbuf->su_ftype[ATH12K_HTT_FTYPE_TBR_LMR]));
|
||||
len += scnprintf(buf + len, buf_len - len, "SU TF_REPORT = %u\n",
|
||||
le32_to_cpu(sbuf->su_ftype[ATH12K_HTT_FTYPE_TF_RPRT]));
|
||||
len += scnprintf(buf + len, buf_len - len, "MU poll = %u\n",
|
||||
le32_to_cpu(sbuf->mu_ftype[ATH12K_HTT_FTYPE_TF_POLL]));
|
||||
len += scnprintf(buf + len, buf_len - len, "MU sound = %u\n",
|
||||
le32_to_cpu(sbuf->mu_ftype[ATH12K_HTT_FTYPE_TF_SOUND]));
|
||||
len += scnprintf(buf + len, buf_len - len, "MU NDPA = %u\n",
|
||||
le32_to_cpu(sbuf->mu_ftype[ATH12K_HTT_FTYPE_TBR_NDPA]));
|
||||
len += scnprintf(buf + len, buf_len - len, "MU NDP = %u\n",
|
||||
le32_to_cpu(sbuf->mu_ftype[ATH12K_HTT_FTYPE_TBR_NDP]));
|
||||
len += scnprintf(buf + len, buf_len - len, "MU LMR = %u\n",
|
||||
le32_to_cpu(sbuf->mu_ftype[ATH12K_HTT_FTYPE_TBR_LMR]));
|
||||
len += scnprintf(buf + len, buf_len - len, "MU TF_REPORT = %u\n\n",
|
||||
le32_to_cpu(sbuf->mu_ftype[ATH12K_HTT_FTYPE_TF_RPRT]));
|
||||
|
||||
req->buf_len = len;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_htt_print_pdev_rtt_tbr_cmd_res_stats_tlv(const void *tag_buf, u16 tag_len,
|
||||
struct debug_htt_stats_req *stats_req)
|
||||
{
|
||||
const struct ath12k_htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv *sbuf = tag_buf;
|
||||
u32 buf_len = ATH12K_HTT_STATS_BUF_SIZE;
|
||||
u32 len = stats_req->buf_len;
|
||||
u8 *buf = stats_req->buf, i;
|
||||
|
||||
if (tag_len < sizeof(*sbuf))
|
||||
return;
|
||||
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG:\n");
|
||||
for (i = 0; i < le32_to_cpu(sbuf->tbr_num_sch_cmd_result_buckets); i++) {
|
||||
len += scnprintf(buf + len, buf_len - len, "num_sch_cmd_status_%u:\n", i);
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"SU frame_SGEN_TF_POLL = %u\n",
|
||||
le32_to_cpu(sbuf->su_res[ATH12K_HTT_FTYPE_TF_POLL][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"SU frame_SGEN_TF_SOUND = %u\n",
|
||||
le32_to_cpu(sbuf->su_res[ATH12K_HTT_FTYPE_TF_SOUND][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"SU frame_SGEN_TBR_NDPA = %u\n",
|
||||
le32_to_cpu(sbuf->su_res[ATH12K_HTT_FTYPE_TBR_NDPA][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"SU frame_SGEN_TBR_NDP = %u\n",
|
||||
le32_to_cpu(sbuf->su_res[ATH12K_HTT_FTYPE_TBR_NDP][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"SU frame_SGEN_TBR_LMR = %u\n",
|
||||
le32_to_cpu(sbuf->su_res[ATH12K_HTT_FTYPE_TBR_LMR][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"SU frame_SGEN_TF_REPORT = %u\n",
|
||||
le32_to_cpu(sbuf->su_res[ATH12K_HTT_FTYPE_TF_RPRT][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"MU frame_SGEN_TF_POLL = %u\n",
|
||||
le32_to_cpu(sbuf->mu_res[ATH12K_HTT_FTYPE_TF_POLL][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"MU frame_SGEN_TF_SOUND = %u\n",
|
||||
le32_to_cpu(sbuf->mu_res[ATH12K_HTT_FTYPE_TF_SOUND][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"MU frame_SGEN_TBR_NDPA = %u\n",
|
||||
le32_to_cpu(sbuf->mu_res[ATH12K_HTT_FTYPE_TBR_NDPA][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"MU frame_SGEN_TBR_NDP = %u\n",
|
||||
le32_to_cpu(sbuf->mu_res[ATH12K_HTT_FTYPE_TBR_NDP][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"MU frame_SGEN_TBR_LMR = %u\n",
|
||||
le32_to_cpu(sbuf->mu_res[ATH12K_HTT_FTYPE_TBR_LMR][i]));
|
||||
len += scnprintf(buf + len, buf_len - len,
|
||||
"MU frame_SGEN_TF_REPORT = %u\n\n",
|
||||
le32_to_cpu(sbuf->mu_res[ATH12K_HTT_FTYPE_TF_RPRT][i]));
|
||||
}
|
||||
|
||||
stats_req->buf_len = len;
|
||||
}
|
||||
|
||||
static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
|
||||
u16 tag, u16 len, const void *tag_buf,
|
||||
void *user_data)
|
||||
@@ -5277,12 +5799,40 @@ static int ath12k_dbg_htt_ext_stats_parse(struct ath12k_base *ab,
|
||||
case HTT_STATS_TX_PDEV_RATE_STATS_TAG:
|
||||
ath12k_htt_print_tx_pdev_rate_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_TX_PDEV_HISTOGRAM_STATS_TAG:
|
||||
ath12k_htt_print_histogram_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_RX_PDEV_RATE_STATS_TAG:
|
||||
ath12k_htt_print_rx_pdev_rate_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_RX_PDEV_RATE_EXT_STATS_TAG:
|
||||
ath12k_htt_print_rx_pdev_rate_ext_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_PDEV_TDMA_TAG:
|
||||
ath12k_htt_print_pdev_tdma_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_MLO_SCHED_STATS_TAG:
|
||||
ath12k_htt_print_mlo_sched_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_PDEV_MLO_IPC_STATS_TAG:
|
||||
ath12k_htt_print_mlo_ipc_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_PDEV_RTT_RESP_STATS_TAG:
|
||||
ath12k_htt_print_pdev_rtt_resp_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_PDEV_RTT_INIT_STATS_TAG:
|
||||
ath12k_htt_print_pdev_rtt_init_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_PDEV_RTT_HW_STATS_TAG:
|
||||
ath12k_htt_print_pdev_rtt_hw_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
case HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG:
|
||||
ath12k_htt_print_pdev_rtt_tbr_selfgen_queued_stats_tlv(tag_buf, len,
|
||||
stats_req);
|
||||
break;
|
||||
case HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG:
|
||||
ath12k_htt_print_pdev_rtt_tbr_cmd_res_stats_tlv(tag_buf, len, stats_req);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@@ -5373,7 +5923,7 @@ static ssize_t ath12k_write_htt_stats_type(struct file *file,
|
||||
{
|
||||
struct ath12k *ar = file->private_data;
|
||||
enum ath12k_dbg_htt_ext_stats_type type;
|
||||
unsigned int cfg_param[4] = {0};
|
||||
unsigned int cfg_param[4] = {};
|
||||
const int size = 32;
|
||||
int num_args;
|
||||
|
||||
@@ -5423,7 +5973,7 @@ static int ath12k_debugfs_htt_stats_req(struct ath12k *ar)
|
||||
enum ath12k_dbg_htt_ext_stats_type type = stats_req->type;
|
||||
u64 cookie;
|
||||
int ret, pdev_id;
|
||||
struct htt_ext_stats_cfg_params cfg_params = { 0 };
|
||||
struct htt_ext_stats_cfg_params cfg_params = {};
|
||||
|
||||
lockdep_assert_wiphy(ath12k_ar_to_hw(ar)->wiphy);
|
||||
|
||||
@@ -5562,7 +6112,7 @@ static ssize_t ath12k_write_htt_stats_reset(struct file *file,
|
||||
{
|
||||
struct ath12k *ar = file->private_data;
|
||||
enum ath12k_dbg_htt_ext_stats_type type;
|
||||
struct htt_ext_stats_cfg_params cfg_params = { 0 };
|
||||
struct htt_ext_stats_cfg_params cfg_params = {};
|
||||
u8 param_pos;
|
||||
int ret;
|
||||
|
||||
|
||||
@@ -155,6 +155,11 @@ enum ath12k_dbg_htt_ext_stats_type {
|
||||
ATH12K_DBG_HTT_EXT_STATS_PDEV_SCHED_ALGO = 49,
|
||||
ATH12K_DBG_HTT_EXT_STATS_MANDATORY_MUOFDMA = 51,
|
||||
ATH12K_DGB_HTT_EXT_STATS_PDEV_MBSSID_CTRL_FRAME = 54,
|
||||
ATH12K_DBG_HTT_PDEV_TDMA_STATS = 57,
|
||||
ATH12K_DBG_HTT_MLO_SCHED_STATS = 63,
|
||||
ATH12K_DBG_HTT_PDEV_MLO_IPC_STATS = 64,
|
||||
ATH12K_DBG_HTT_EXT_PDEV_RTT_RESP_STATS = 65,
|
||||
ATH12K_DBG_HTT_EXT_PDEV_RTT_INITIATOR_STATS = 66,
|
||||
|
||||
/* keep this last */
|
||||
ATH12K_DBG_HTT_NUM_EXT_STATS,
|
||||
@@ -237,6 +242,7 @@ enum ath12k_dbg_htt_tlv_tag {
|
||||
HTT_STATS_TX_SELFGEN_BE_ERR_STATS_TAG = 137,
|
||||
HTT_STATS_TX_SELFGEN_BE_STATS_TAG = 138,
|
||||
HTT_STATS_TX_SELFGEN_BE_SCHED_STATUS_STATS_TAG = 139,
|
||||
HTT_STATS_TX_PDEV_HISTOGRAM_STATS_TAG = 144,
|
||||
HTT_STATS_TXBF_OFDMA_AX_NDPA_STATS_TAG = 147,
|
||||
HTT_STATS_TXBF_OFDMA_AX_NDP_STATS_TAG = 148,
|
||||
HTT_STATS_TXBF_OFDMA_AX_BRP_STATS_TAG = 149,
|
||||
@@ -247,6 +253,14 @@ enum ath12k_dbg_htt_tlv_tag {
|
||||
HTT_STATS_PDEV_SCHED_ALGO_OFDMA_STATS_TAG = 165,
|
||||
HTT_STATS_TXBF_OFDMA_AX_STEER_MPDU_STATS_TAG = 172,
|
||||
HTT_STATS_PDEV_MBSSID_CTRL_FRAME_STATS_TAG = 176,
|
||||
HTT_STATS_PDEV_TDMA_TAG = 187,
|
||||
HTT_STATS_MLO_SCHED_STATS_TAG = 190,
|
||||
HTT_STATS_PDEV_MLO_IPC_STATS_TAG = 191,
|
||||
HTT_STATS_PDEV_RTT_RESP_STATS_TAG = 194,
|
||||
HTT_STATS_PDEV_RTT_INIT_STATS_TAG = 195,
|
||||
HTT_STATS_PDEV_RTT_HW_STATS_TAG = 196,
|
||||
HTT_STATS_PDEV_RTT_TBR_SELFGEN_QUEUED_STATS_TAG = 197,
|
||||
HTT_STATS_PDEV_RTT_TBR_CMD_RESULT_STATS_TAG = 198,
|
||||
|
||||
HTT_STATS_MAX_TAG,
|
||||
};
|
||||
@@ -418,6 +432,12 @@ struct ath12k_htt_tx_pdev_mu_ppdu_dist_stats_tlv {
|
||||
#define ATH12K_HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS 2
|
||||
#define ATH12K_HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS 2
|
||||
#define ATH12K_HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES 6
|
||||
#define ATH12K_HTT_TX_PDEV_STATS_NUM_PER_COUNTERS 101
|
||||
|
||||
#define ATH12K_HTT_TX_PDEV_STATS_NUM_MCS_DROP_COUNTERS \
|
||||
(ATH12K_HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS + \
|
||||
ATH12K_HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS + \
|
||||
ATH12K_HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS)
|
||||
|
||||
struct ath12k_htt_tx_pdev_rate_stats_tlv {
|
||||
__le32 mac_id_word;
|
||||
@@ -470,7 +490,16 @@ struct ath12k_htt_tx_pdev_rate_stats_tlv {
|
||||
[ATH12K_HTT_TX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
|
||||
__le32 tx_mcs_ext_2[ATH12K_HTT_TX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
|
||||
__le32 tx_bw_320mhz;
|
||||
};
|
||||
} __packed;
|
||||
|
||||
struct ath12k_htt_tx_histogram_stats_tlv {
|
||||
__le32 rate_retry_mcs_drop_cnt;
|
||||
__le32 mcs_drop_rate[ATH12K_HTT_TX_PDEV_STATS_NUM_MCS_DROP_COUNTERS];
|
||||
__le32 per_histogram_cnt[ATH12K_HTT_TX_PDEV_STATS_NUM_PER_COUNTERS];
|
||||
__le32 low_latency_rate_cnt;
|
||||
__le32 su_burst_rate_drop_cnt;
|
||||
__le32 su_burst_rate_drop_fail_cnt;
|
||||
} __packed;
|
||||
|
||||
#define ATH12K_HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
|
||||
#define ATH12K_HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
|
||||
@@ -550,7 +579,7 @@ struct ath12k_htt_rx_pdev_rate_stats_tlv {
|
||||
__le32 rx_ulofdma_non_data_nusers[ATH12K_HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
|
||||
__le32 rx_ulofdma_data_nusers[ATH12K_HTT_RX_PDEV_MAX_OFDMA_NUM_USER];
|
||||
__le32 rx_mcs_ext[ATH12K_HTT_RX_PDEV_STATS_NUM_EXTRA_MCS_COUNTERS];
|
||||
};
|
||||
} __packed;
|
||||
|
||||
#define ATH12K_HTT_RX_PDEV_STATS_NUM_BW_EXT_COUNTERS 4
|
||||
#define ATH12K_HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS_EXT 14
|
||||
@@ -580,7 +609,7 @@ struct ath12k_htt_rx_pdev_rate_ext_stats_tlv {
|
||||
__le32 rx_gi_ext_2[ATH12K_HTT_RX_PDEV_STATS_NUM_GI_COUNTERS]
|
||||
[ATH12K_HTT_RX_PDEV_STATS_NUM_EXTRA2_MCS_COUNTERS];
|
||||
__le32 rx_su_punctured_mode[ATH12K_HTT_RX_PDEV_STATS_NUM_PUNCTURED_MODE_COUNTERS];
|
||||
};
|
||||
} __packed;
|
||||
|
||||
#define ATH12K_HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID GENMASK(7, 0)
|
||||
#define ATH12K_HTT_TX_PDEV_STATS_SCHED_PER_TXQ_ID GENMASK(15, 8)
|
||||
@@ -1872,4 +1901,176 @@ struct ath12k_htt_pdev_mbssid_ctrl_frame_tlv {
|
||||
__le32 ul_mumimo_trigger_within_bss;
|
||||
} __packed;
|
||||
|
||||
struct ath12k_htt_pdev_tdma_stats_tlv {
|
||||
__le32 mac_id__word;
|
||||
__le32 num_tdma_active_schedules;
|
||||
__le32 num_tdma_reserved_schedules;
|
||||
__le32 num_tdma_restricted_schedules;
|
||||
__le32 num_tdma_unconfigured_schedules;
|
||||
__le32 num_tdma_slot_switches;
|
||||
__le32 num_tdma_edca_switches;
|
||||
} __packed;
|
||||
|
||||
struct ath12k_htt_mlo_sched_stats_tlv {
|
||||
__le32 pref_link_num_sec_link_sched;
|
||||
__le32 pref_link_num_pref_link_timeout;
|
||||
__le32 pref_link_num_pref_link_sch_delay_ipc;
|
||||
__le32 pref_link_num_pref_link_timeout_ipc;
|
||||
} __packed;
|
||||
|
||||
#define ATH12K_HTT_HWMLO_MAX_LINKS 6
|
||||
#define ATH12K_HTT_MLO_MAX_IPC_RINGS 7
|
||||
|
||||
struct ath12k_htt_pdev_mlo_ipc_stats_tlv {
|
||||
__le32 mlo_ipc_ring_cnt[ATH12K_HTT_HWMLO_MAX_LINKS][ATH12K_HTT_MLO_MAX_IPC_RINGS];
|
||||
} __packed;
|
||||
|
||||
struct ath12k_htt_stats_pdev_rtt_resp_stats_tlv {
|
||||
__le32 pdev_id;
|
||||
__le32 tx_11mc_ftm_suc;
|
||||
__le32 tx_11mc_ftm_suc_retry;
|
||||
__le32 tx_11mc_ftm_fail;
|
||||
__le32 rx_11mc_ftmr_cnt;
|
||||
__le32 rx_11mc_ftmr_dup_cnt;
|
||||
__le32 rx_11mc_iftmr_cnt;
|
||||
__le32 rx_11mc_iftmr_dup_cnt;
|
||||
__le32 ftmr_drop_11mc_resp_role_not_enabled_cnt;
|
||||
__le32 initiator_active_responder_rejected_cnt;
|
||||
__le32 responder_terminate_cnt;
|
||||
__le32 active_rsta_open;
|
||||
__le32 active_rsta_mac;
|
||||
__le32 active_rsta_mac_phy;
|
||||
__le32 num_assoc_ranging_peers;
|
||||
__le32 num_unassoc_ranging_peers;
|
||||
__le32 responder_alloc_cnt;
|
||||
__le32 responder_alloc_failure;
|
||||
__le32 pn_check_failure_cnt;
|
||||
__le32 pasn_m1_auth_recv_cnt;
|
||||
__le32 pasn_m1_auth_drop_cnt;
|
||||
__le32 pasn_m2_auth_recv_cnt;
|
||||
__le32 pasn_m2_auth_tx_fail_cnt;
|
||||
__le32 pasn_m3_auth_recv_cnt;
|
||||
__le32 pasn_m3_auth_drop_cnt;
|
||||
__le32 pasn_peer_create_request_cnt;
|
||||
__le32 pasn_peer_create_timeout_cnt;
|
||||
__le32 pasn_peer_created_cnt;
|
||||
__le32 sec_ranging_not_supported_mfp_not_setup;
|
||||
__le32 non_sec_ranging_discarded_for_assoc_peer;
|
||||
__le32 open_ranging_discarded_set_for_pasn_peer;
|
||||
__le32 unassoc_non_pasn_ranging_not_supported;
|
||||
__le32 num_req_bw_20_mhz;
|
||||
__le32 num_req_bw_40_mhz;
|
||||
__le32 num_req_bw_80_mhz;
|
||||
__le32 num_req_bw_160_mhz;
|
||||
__le32 tx_11az_ftm_successful;
|
||||
__le32 tx_11az_ftm_failed;
|
||||
__le32 rx_11az_ftmr_cnt;
|
||||
__le32 rx_11az_ftmr_dup_cnt;
|
||||
__le32 rx_11az_iftmr_dup_cnt;
|
||||
__le32 malformed_ftmr;
|
||||
__le32 ftmr_drop_ntb_resp_role_not_enabled_cnt;
|
||||
__le32 ftmr_drop_tb_resp_role_not_enabled_cnt;
|
||||
__le32 invalid_ftm_request_params;
|
||||
__le32 requested_bw_format_not_supported;
|
||||
__le32 ntb_unsec_unassoc_ranging_peer_alloc_failed;
|
||||
__le32 tb_unassoc_unsec_pasn_peer_creation_failed;
|
||||
__le32 num_ranging_sequences_processed;
|
||||
__le32 ntb_tx_ndp;
|
||||
__le32 ndp_rx_cnt;
|
||||
__le32 num_ntb_ranging_ndpas_recv;
|
||||
__le32 recv_lmr;
|
||||
__le32 invalid_ftmr_cnt;
|
||||
__le32 max_time_bw_meas_exp_cnt;
|
||||
} __packed;
|
||||
|
||||
#define ATH12K_HTT_MAX_SCH_CMD_RESULT 25
|
||||
#define ATH12K_HTT_SCH_CMD_STATUS_CNT 9
|
||||
|
||||
struct ath12k_htt_stats_pdev_rtt_init_stats_tlv {
|
||||
__le32 pdev_id;
|
||||
__le32 tx_11mc_ftmr_cnt;
|
||||
__le32 tx_11mc_ftmr_fail;
|
||||
__le32 tx_11mc_ftmr_suc_retry;
|
||||
__le32 rx_11mc_ftm_cnt;
|
||||
__le32 tx_meas_req_count;
|
||||
__le32 init_role_not_enabled;
|
||||
__le32 initiator_terminate_cnt;
|
||||
__le32 tx_11az_ftmr_fail;
|
||||
__le32 tx_11az_ftmr_start;
|
||||
__le32 tx_11az_ftmr_stop;
|
||||
__le32 rx_11az_ftm_cnt;
|
||||
__le32 active_ista;
|
||||
__le32 invalid_preamble;
|
||||
__le32 invalid_chan_bw_format;
|
||||
__le32 mgmt_buff_alloc_fail_cnt;
|
||||
__le32 ftm_parse_failure;
|
||||
__le32 ranging_negotiation_successful_cnt;
|
||||
__le32 incompatible_ftm_params;
|
||||
__le32 sec_ranging_req_in_open_mode;
|
||||
__le32 ftmr_tx_failed_null_11az_peer;
|
||||
__le32 ftmr_retry_timeout;
|
||||
__le32 max_time_bw_meas_exp_cnt;
|
||||
__le32 tb_meas_duration_expiry_cnt;
|
||||
__le32 num_tb_ranging_requests;
|
||||
__le32 ntbr_triggered_successfully;
|
||||
__le32 ntbr_trigger_failed;
|
||||
__le32 invalid_or_no_vreg_idx;
|
||||
__le32 set_vreg_params_failed;
|
||||
__le32 sac_mismatch;
|
||||
__le32 pasn_m1_auth_recv_cnt;
|
||||
__le32 pasn_m1_auth_tx_fail_cnt;
|
||||
__le32 pasn_m2_auth_recv_cnt;
|
||||
__le32 pasn_m2_auth_drop_cnt;
|
||||
__le32 pasn_m3_auth_recv_cnt;
|
||||
__le32 pasn_m3_auth_tx_fail_cnt;
|
||||
__le32 pasn_peer_create_request_cnt;
|
||||
__le32 pasn_peer_create_timeout_cnt;
|
||||
__le32 pasn_peer_created_cnt;
|
||||
__le32 ntbr_ndpa_failed;
|
||||
__le32 ntbr_sequence_successful;
|
||||
__le32 ntbr_ndp_failed;
|
||||
__le32 sch_cmd_status_cnts[ATH12K_HTT_SCH_CMD_STATUS_CNT];
|
||||
__le32 lmr_timeout;
|
||||
__le32 lmr_recv;
|
||||
__le32 num_trigger_frames_received;
|
||||
__le32 num_tb_ranging_ndpas_recv;
|
||||
__le32 ndp_rx_cnt;
|
||||
} __packed;
|
||||
|
||||
struct ath12k_htt_stats_pdev_rtt_hw_stats_tlv {
|
||||
__le32 ista_ranging_ndpa_cnt;
|
||||
__le32 ista_ranging_ndp_cnt;
|
||||
__le32 ista_ranging_i2r_lmr_cnt;
|
||||
__le32 rtsa_ranging_resp_cnt;
|
||||
__le32 rtsa_ranging_ndp_cnt;
|
||||
__le32 rsta_ranging_lmr_cnt;
|
||||
__le32 tb_ranging_cts2s_rcvd_cnt;
|
||||
__le32 tb_ranging_ndp_rcvd_cnt;
|
||||
__le32 tb_ranging_lmr_rcvd_cnt;
|
||||
__le32 tb_ranging_tf_poll_resp_sent_cnt;
|
||||
__le32 tb_ranging_tf_sound_resp_sent_cnt;
|
||||
__le32 tb_ranging_tf_report_resp_sent_cnt;
|
||||
} __packed;
|
||||
|
||||
enum ath12k_htt_stats_txsend_ftype {
|
||||
ATH12K_HTT_FTYPE_TF_POLL,
|
||||
ATH12K_HTT_FTYPE_TF_SOUND,
|
||||
ATH12K_HTT_FTYPE_TBR_NDPA,
|
||||
ATH12K_HTT_FTYPE_TBR_NDP,
|
||||
ATH12K_HTT_FTYPE_TBR_LMR,
|
||||
ATH12K_HTT_FTYPE_TF_RPRT,
|
||||
ATH12K_HTT_FTYPE_MAX
|
||||
};
|
||||
|
||||
struct ath12k_htt_stats_pdev_rtt_tbr_tlv {
|
||||
__le32 su_ftype[ATH12K_HTT_FTYPE_MAX];
|
||||
__le32 mu_ftype[ATH12K_HTT_FTYPE_MAX];
|
||||
} __packed;
|
||||
|
||||
struct ath12k_htt_stats_pdev_rtt_tbr_cmd_result_stats_tlv {
|
||||
__le32 tbr_num_sch_cmd_result_buckets;
|
||||
__le32 su_res[ATH12K_HTT_FTYPE_MAX][ATH12K_HTT_MAX_SCH_CMD_RESULT];
|
||||
__le32 mu_res[ATH12K_HTT_FTYPE_MAX][ATH12K_HTT_MAX_SCH_CMD_RESULT];
|
||||
} __packed;
|
||||
|
||||
#endif
|
||||
|
||||
@@ -84,7 +84,6 @@ int ath12k_dp_peer_setup(struct ath12k *ar, int vdev_id, const u8 *addr)
|
||||
ret = ath12k_dp_rx_peer_frag_setup(ar, addr, vdev_id);
|
||||
if (ret) {
|
||||
ath12k_warn(ab, "failed to setup rx defrag context\n");
|
||||
tid--;
|
||||
goto peer_clean;
|
||||
}
|
||||
|
||||
@@ -102,7 +101,7 @@ peer_clean:
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
for (; tid >= 0; tid--)
|
||||
for (tid--; tid >= 0; tid--)
|
||||
ath12k_dp_rx_peer_tid_delete(ar, peer, tid);
|
||||
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
@@ -242,7 +241,7 @@ int ath12k_dp_srng_setup(struct ath12k_base *ab, struct dp_srng *ring,
|
||||
enum hal_ring_type type, int ring_num,
|
||||
int mac_id, int num_entries)
|
||||
{
|
||||
struct hal_srng_params params = { 0 };
|
||||
struct hal_srng_params params = {};
|
||||
int entry_sz = ath12k_hal_srng_get_entrysize(ab, type);
|
||||
int max_entries = ath12k_hal_srng_get_max_entries(ab, type);
|
||||
int ret;
|
||||
@@ -521,7 +520,7 @@ static int ath12k_dp_srng_common_setup(struct ath12k_base *ab)
|
||||
|
||||
ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_comp_ring,
|
||||
HAL_WBM2SW_RELEASE, tx_comp_ring_num, 0,
|
||||
DP_TX_COMP_RING_SIZE);
|
||||
DP_TX_COMP_RING_SIZE(ab));
|
||||
if (ret) {
|
||||
ath12k_warn(ab, "failed to set up tcl_comp ring (%d) :%d\n",
|
||||
tx_comp_ring_num, ret);
|
||||
@@ -1084,8 +1083,8 @@ out:
|
||||
|
||||
int ath12k_dp_htt_connect(struct ath12k_dp *dp)
|
||||
{
|
||||
struct ath12k_htc_svc_conn_req conn_req = {0};
|
||||
struct ath12k_htc_svc_conn_resp conn_resp = {0};
|
||||
struct ath12k_htc_svc_conn_req conn_req = {};
|
||||
struct ath12k_htc_svc_conn_resp conn_resp = {};
|
||||
int status;
|
||||
|
||||
conn_req.ep_ops.ep_tx_complete = ath12k_dp_htt_htc_tx_complete;
|
||||
@@ -1164,31 +1163,36 @@ static void ath12k_dp_cc_cleanup(struct ath12k_base *ab)
|
||||
/* RX Descriptor cleanup */
|
||||
spin_lock_bh(&dp->rx_desc_lock);
|
||||
|
||||
for (i = 0; i < ATH12K_NUM_RX_SPT_PAGES; i++) {
|
||||
desc_info = dp->rxbaddr[i];
|
||||
|
||||
for (j = 0; j < ATH12K_MAX_SPT_ENTRIES; j++) {
|
||||
if (!desc_info[j].in_use) {
|
||||
list_del(&desc_info[j].list);
|
||||
if (dp->rxbaddr) {
|
||||
for (i = 0; i < ATH12K_NUM_RX_SPT_PAGES(ab); i++) {
|
||||
if (!dp->rxbaddr[i])
|
||||
continue;
|
||||
|
||||
desc_info = dp->rxbaddr[i];
|
||||
|
||||
for (j = 0; j < ATH12K_MAX_SPT_ENTRIES; j++) {
|
||||
if (!desc_info[j].in_use) {
|
||||
list_del(&desc_info[j].list);
|
||||
continue;
|
||||
}
|
||||
|
||||
skb = desc_info[j].skb;
|
||||
if (!skb)
|
||||
continue;
|
||||
|
||||
dma_unmap_single(ab->dev,
|
||||
ATH12K_SKB_RXCB(skb)->paddr,
|
||||
skb->len + skb_tailroom(skb),
|
||||
DMA_FROM_DEVICE);
|
||||
dev_kfree_skb_any(skb);
|
||||
}
|
||||
|
||||
skb = desc_info[j].skb;
|
||||
if (!skb)
|
||||
continue;
|
||||
|
||||
dma_unmap_single(ab->dev, ATH12K_SKB_RXCB(skb)->paddr,
|
||||
skb->len + skb_tailroom(skb), DMA_FROM_DEVICE);
|
||||
dev_kfree_skb_any(skb);
|
||||
kfree(dp->rxbaddr[i]);
|
||||
dp->rxbaddr[i] = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < ATH12K_NUM_RX_SPT_PAGES; i++) {
|
||||
if (!dp->rxbaddr[i])
|
||||
continue;
|
||||
|
||||
kfree(dp->rxbaddr[i]);
|
||||
dp->rxbaddr[i] = NULL;
|
||||
kfree(dp->rxbaddr);
|
||||
dp->rxbaddr = NULL;
|
||||
}
|
||||
|
||||
spin_unlock_bh(&dp->rx_desc_lock);
|
||||
@@ -1197,8 +1201,8 @@ static void ath12k_dp_cc_cleanup(struct ath12k_base *ab)
|
||||
for (i = 0; i < ATH12K_HW_MAX_QUEUES; i++) {
|
||||
spin_lock_bh(&dp->tx_desc_lock[i]);
|
||||
|
||||
list_for_each_entry_safe(tx_desc_info, tmp1, &dp->tx_desc_used_list[i],
|
||||
list) {
|
||||
list_for_each_entry_safe(tx_desc_info, tmp1,
|
||||
&dp->tx_desc_used_list[i], list) {
|
||||
list_del(&tx_desc_info->list);
|
||||
skb = tx_desc_info->skb;
|
||||
|
||||
@@ -1232,19 +1236,25 @@ static void ath12k_dp_cc_cleanup(struct ath12k_base *ab)
|
||||
spin_unlock_bh(&dp->tx_desc_lock[i]);
|
||||
}
|
||||
|
||||
for (pool_id = 0; pool_id < ATH12K_HW_MAX_QUEUES; pool_id++) {
|
||||
spin_lock_bh(&dp->tx_desc_lock[pool_id]);
|
||||
if (dp->txbaddr) {
|
||||
for (pool_id = 0; pool_id < ATH12K_HW_MAX_QUEUES; pool_id++) {
|
||||
spin_lock_bh(&dp->tx_desc_lock[pool_id]);
|
||||
|
||||
for (i = 0; i < ATH12K_TX_SPT_PAGES_PER_POOL; i++) {
|
||||
tx_spt_page = i + pool_id * ATH12K_TX_SPT_PAGES_PER_POOL;
|
||||
if (!dp->txbaddr[tx_spt_page])
|
||||
continue;
|
||||
for (i = 0; i < ATH12K_TX_SPT_PAGES_PER_POOL(ab); i++) {
|
||||
tx_spt_page = i + pool_id *
|
||||
ATH12K_TX_SPT_PAGES_PER_POOL(ab);
|
||||
if (!dp->txbaddr[tx_spt_page])
|
||||
continue;
|
||||
|
||||
kfree(dp->txbaddr[tx_spt_page]);
|
||||
dp->txbaddr[tx_spt_page] = NULL;
|
||||
kfree(dp->txbaddr[tx_spt_page]);
|
||||
dp->txbaddr[tx_spt_page] = NULL;
|
||||
}
|
||||
|
||||
spin_unlock_bh(&dp->tx_desc_lock[pool_id]);
|
||||
}
|
||||
|
||||
spin_unlock_bh(&dp->tx_desc_lock[pool_id]);
|
||||
kfree(dp->txbaddr);
|
||||
dp->txbaddr = NULL;
|
||||
}
|
||||
|
||||
/* unmap SPT pages */
|
||||
@@ -1393,8 +1403,8 @@ struct ath12k_rx_desc_info *ath12k_dp_get_rx_desc(struct ath12k_base *ab,
|
||||
ppt_idx = u32_get_bits(cookie, ATH12K_DP_CC_COOKIE_PPT);
|
||||
spt_idx = u32_get_bits(cookie, ATH12K_DP_CC_COOKIE_SPT);
|
||||
|
||||
start_ppt_idx = dp->rx_ppt_base + ATH12K_RX_SPT_PAGE_OFFSET;
|
||||
end_ppt_idx = start_ppt_idx + ATH12K_NUM_RX_SPT_PAGES;
|
||||
start_ppt_idx = dp->rx_ppt_base + ATH12K_RX_SPT_PAGE_OFFSET(ab);
|
||||
end_ppt_idx = start_ppt_idx + ATH12K_NUM_RX_SPT_PAGES(ab);
|
||||
|
||||
if (ppt_idx < start_ppt_idx ||
|
||||
ppt_idx >= end_ppt_idx ||
|
||||
@@ -1418,7 +1428,7 @@ struct ath12k_tx_desc_info *ath12k_dp_get_tx_desc(struct ath12k_base *ab,
|
||||
|
||||
start_ppt_idx = ATH12K_TX_SPT_PAGE_OFFSET;
|
||||
end_ppt_idx = start_ppt_idx +
|
||||
(ATH12K_TX_SPT_PAGES_PER_POOL * ATH12K_HW_MAX_QUEUES);
|
||||
(ATH12K_TX_SPT_PAGES_PER_POOL(ab) * ATH12K_HW_MAX_QUEUES);
|
||||
|
||||
if (ppt_idx < start_ppt_idx ||
|
||||
ppt_idx >= end_ppt_idx ||
|
||||
@@ -1435,13 +1445,24 @@ static int ath12k_dp_cc_desc_init(struct ath12k_base *ab)
|
||||
struct ath12k_dp *dp = &ab->dp;
|
||||
struct ath12k_rx_desc_info *rx_descs, **rx_desc_addr;
|
||||
struct ath12k_tx_desc_info *tx_descs, **tx_desc_addr;
|
||||
u32 num_rx_spt_pages = ATH12K_NUM_RX_SPT_PAGES(ab);
|
||||
u32 i, j, pool_id, tx_spt_page;
|
||||
u32 ppt_idx, cookie_ppt_idx;
|
||||
|
||||
spin_lock_bh(&dp->rx_desc_lock);
|
||||
|
||||
/* First ATH12K_NUM_RX_SPT_PAGES of allocated SPT pages are used for RX */
|
||||
for (i = 0; i < ATH12K_NUM_RX_SPT_PAGES; i++) {
|
||||
dp->rxbaddr = kcalloc(num_rx_spt_pages,
|
||||
sizeof(struct ath12k_rx_desc_info *), GFP_ATOMIC);
|
||||
|
||||
if (!dp->rxbaddr) {
|
||||
spin_unlock_bh(&dp->rx_desc_lock);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* First ATH12K_NUM_RX_SPT_PAGES(ab) of allocated SPT pages are used for
|
||||
* RX
|
||||
*/
|
||||
for (i = 0; i < num_rx_spt_pages; i++) {
|
||||
rx_descs = kcalloc(ATH12K_MAX_SPT_ENTRIES, sizeof(*rx_descs),
|
||||
GFP_ATOMIC);
|
||||
|
||||
@@ -1450,7 +1471,7 @@ static int ath12k_dp_cc_desc_init(struct ath12k_base *ab)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
ppt_idx = ATH12K_RX_SPT_PAGE_OFFSET + i;
|
||||
ppt_idx = ATH12K_RX_SPT_PAGE_OFFSET(ab) + i;
|
||||
cookie_ppt_idx = dp->rx_ppt_base + ppt_idx;
|
||||
dp->rxbaddr[i] = &rx_descs[0];
|
||||
|
||||
@@ -1468,9 +1489,15 @@ static int ath12k_dp_cc_desc_init(struct ath12k_base *ab)
|
||||
|
||||
spin_unlock_bh(&dp->rx_desc_lock);
|
||||
|
||||
dp->txbaddr = kcalloc(ATH12K_NUM_TX_SPT_PAGES(ab),
|
||||
sizeof(struct ath12k_tx_desc_info *), GFP_ATOMIC);
|
||||
|
||||
if (!dp->txbaddr)
|
||||
return -ENOMEM;
|
||||
|
||||
for (pool_id = 0; pool_id < ATH12K_HW_MAX_QUEUES; pool_id++) {
|
||||
spin_lock_bh(&dp->tx_desc_lock[pool_id]);
|
||||
for (i = 0; i < ATH12K_TX_SPT_PAGES_PER_POOL; i++) {
|
||||
for (i = 0; i < ATH12K_TX_SPT_PAGES_PER_POOL(ab); i++) {
|
||||
tx_descs = kcalloc(ATH12K_MAX_SPT_ENTRIES, sizeof(*tx_descs),
|
||||
GFP_ATOMIC);
|
||||
|
||||
@@ -1480,7 +1507,8 @@ static int ath12k_dp_cc_desc_init(struct ath12k_base *ab)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
tx_spt_page = i + pool_id * ATH12K_TX_SPT_PAGES_PER_POOL;
|
||||
tx_spt_page = i + pool_id *
|
||||
ATH12K_TX_SPT_PAGES_PER_POOL(ab);
|
||||
ppt_idx = ATH12K_TX_SPT_PAGE_OFFSET + tx_spt_page;
|
||||
|
||||
dp->txbaddr[tx_spt_page] = &tx_descs[0];
|
||||
@@ -1514,12 +1542,12 @@ static int ath12k_dp_cmem_init(struct ath12k_base *ab,
|
||||
switch (type) {
|
||||
case ATH12K_DP_TX_DESC:
|
||||
start = ATH12K_TX_SPT_PAGE_OFFSET;
|
||||
end = start + ATH12K_NUM_TX_SPT_PAGES;
|
||||
end = start + ATH12K_NUM_TX_SPT_PAGES(ab);
|
||||
break;
|
||||
case ATH12K_DP_RX_DESC:
|
||||
cmem_base += ATH12K_PPT_ADDR_OFFSET(dp->rx_ppt_base);
|
||||
start = ATH12K_RX_SPT_PAGE_OFFSET;
|
||||
end = start + ATH12K_NUM_RX_SPT_PAGES;
|
||||
start = ATH12K_RX_SPT_PAGE_OFFSET(ab);
|
||||
end = start + ATH12K_NUM_RX_SPT_PAGES(ab);
|
||||
break;
|
||||
default:
|
||||
ath12k_err(ab, "invalid descriptor type %d in cmem init\n", type);
|
||||
@@ -1547,6 +1575,11 @@ void ath12k_dp_partner_cc_init(struct ath12k_base *ab)
|
||||
}
|
||||
}
|
||||
|
||||
static u32 ath12k_dp_get_num_spt_pages(struct ath12k_base *ab)
|
||||
{
|
||||
return ATH12K_NUM_RX_SPT_PAGES(ab) + ATH12K_NUM_TX_SPT_PAGES(ab);
|
||||
}
|
||||
|
||||
static int ath12k_dp_cc_init(struct ath12k_base *ab)
|
||||
{
|
||||
struct ath12k_dp *dp = &ab->dp;
|
||||
@@ -1561,7 +1594,7 @@ static int ath12k_dp_cc_init(struct ath12k_base *ab)
|
||||
spin_lock_init(&dp->tx_desc_lock[i]);
|
||||
}
|
||||
|
||||
dp->num_spt_pages = ATH12K_NUM_SPT_PAGES;
|
||||
dp->num_spt_pages = ath12k_dp_get_num_spt_pages(ab);
|
||||
if (dp->num_spt_pages > ATH12K_MAX_PPT_ENTRIES)
|
||||
dp->num_spt_pages = ATH12K_MAX_PPT_ENTRIES;
|
||||
|
||||
@@ -1573,7 +1606,7 @@ static int ath12k_dp_cc_init(struct ath12k_base *ab)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
dp->rx_ppt_base = ab->device_id * ATH12K_NUM_RX_SPT_PAGES;
|
||||
dp->rx_ppt_base = ab->device_id * ATH12K_NUM_RX_SPT_PAGES(ab);
|
||||
|
||||
for (i = 0; i < dp->num_spt_pages; i++) {
|
||||
dp->spt_info[i].vaddr = dma_alloc_coherent(ab->dev,
|
||||
@@ -1748,7 +1781,8 @@ int ath12k_dp_alloc(struct ath12k_base *ab)
|
||||
if (ret)
|
||||
goto fail_dp_bank_profiles_cleanup;
|
||||
|
||||
size = sizeof(struct hal_wbm_release_ring_tx) * DP_TX_COMP_RING_SIZE;
|
||||
size = sizeof(struct hal_wbm_release_ring_tx) *
|
||||
DP_TX_COMP_RING_SIZE(ab);
|
||||
|
||||
ret = ath12k_dp_reoq_lut_setup(ab);
|
||||
if (ret) {
|
||||
@@ -1760,7 +1794,7 @@ int ath12k_dp_alloc(struct ath12k_base *ab)
|
||||
dp->tx_ring[i].tcl_data_ring_id = i;
|
||||
|
||||
dp->tx_ring[i].tx_status_head = 0;
|
||||
dp->tx_ring[i].tx_status_tail = DP_TX_COMP_RING_SIZE - 1;
|
||||
dp->tx_ring[i].tx_status_tail = DP_TX_COMP_RING_SIZE(ab) - 1;
|
||||
dp->tx_ring[i].tx_status = kmalloc(size, GFP_KERNEL);
|
||||
if (!dp->tx_ring[i].tx_status) {
|
||||
ret = -ENOMEM;
|
||||
|
||||
@@ -46,7 +46,7 @@ struct dp_rxdma_ring {
|
||||
int bufs_max;
|
||||
};
|
||||
|
||||
#define ATH12K_TX_COMPL_NEXT(x) (((x) + 1) % DP_TX_COMP_RING_SIZE)
|
||||
#define ATH12K_TX_COMPL_NEXT(ab, x) (((x) + 1) % DP_TX_COMP_RING_SIZE(ab))
|
||||
|
||||
struct dp_tx_ring {
|
||||
u8 tcl_data_ring_id;
|
||||
@@ -174,8 +174,9 @@ struct ath12k_pdev_dp {
|
||||
|
||||
#define DP_WBM_RELEASE_RING_SIZE 64
|
||||
#define DP_TCL_DATA_RING_SIZE 512
|
||||
#define DP_TX_COMP_RING_SIZE 32768
|
||||
#define DP_TX_IDR_SIZE DP_TX_COMP_RING_SIZE
|
||||
#define DP_TX_COMP_RING_SIZE(ab) \
|
||||
((ab)->profile_param->dp_params.tx_comp_ring_size)
|
||||
#define DP_TX_IDR_SIZE(ab) DP_TX_COMP_RING_SIZE(ab)
|
||||
#define DP_TCL_CMD_RING_SIZE 32
|
||||
#define DP_TCL_STATUS_RING_SIZE 32
|
||||
#define DP_REO_DST_RING_MAX 8
|
||||
@@ -190,8 +191,10 @@ struct ath12k_pdev_dp {
|
||||
#define DP_RXDMA_REFILL_RING_SIZE 2048
|
||||
#define DP_RXDMA_ERR_DST_RING_SIZE 1024
|
||||
#define DP_RXDMA_MON_STATUS_RING_SIZE 1024
|
||||
#define DP_RXDMA_MONITOR_BUF_RING_SIZE 4096
|
||||
#define DP_RXDMA_MONITOR_DST_RING_SIZE 8092
|
||||
#define DP_RXDMA_MONITOR_BUF_RING_SIZE(ab) \
|
||||
((ab)->profile_param->dp_params.rxdma_monitor_buf_ring_size)
|
||||
#define DP_RXDMA_MONITOR_DST_RING_SIZE(ab) \
|
||||
((ab)->profile_param->dp_params.rxdma_monitor_dst_ring_size)
|
||||
#define DP_RXDMA_MONITOR_DESC_RING_SIZE 4096
|
||||
#define DP_TX_MONITOR_BUF_RING_SIZE 4096
|
||||
#define DP_TX_MONITOR_DEST_RING_SIZE 2048
|
||||
@@ -225,10 +228,11 @@ struct ath12k_pdev_dp {
|
||||
#define ATH12K_SHADOW_DP_TIMER_INTERVAL 20
|
||||
#define ATH12K_SHADOW_CTRL_TIMER_INTERVAL 10
|
||||
|
||||
#define ATH12K_NUM_POOL_TX_DESC 32768
|
||||
|
||||
#define ATH12K_NUM_POOL_TX_DESC(ab) \
|
||||
((ab)->profile_param->dp_params.num_pool_tx_desc)
|
||||
/* TODO: revisit this count during testing */
|
||||
#define ATH12K_RX_DESC_COUNT (12288)
|
||||
#define ATH12K_RX_DESC_COUNT(ab) \
|
||||
((ab)->profile_param->dp_params.rx_desc_count)
|
||||
|
||||
#define ATH12K_PAGE_SIZE PAGE_SIZE
|
||||
|
||||
@@ -240,20 +244,21 @@ struct ath12k_pdev_dp {
|
||||
/* Total 512 entries in a SPT, i.e 4K Page/8 */
|
||||
#define ATH12K_MAX_SPT_ENTRIES 512
|
||||
|
||||
#define ATH12K_NUM_RX_SPT_PAGES ((ATH12K_RX_DESC_COUNT) / ATH12K_MAX_SPT_ENTRIES)
|
||||
|
||||
#define ATH12K_TX_SPT_PAGES_PER_POOL (ATH12K_NUM_POOL_TX_DESC / \
|
||||
#define ATH12K_NUM_RX_SPT_PAGES(ab) ((ATH12K_RX_DESC_COUNT(ab)) / \
|
||||
ATH12K_MAX_SPT_ENTRIES)
|
||||
#define ATH12K_NUM_TX_SPT_PAGES (ATH12K_TX_SPT_PAGES_PER_POOL * ATH12K_HW_MAX_QUEUES)
|
||||
#define ATH12K_NUM_SPT_PAGES (ATH12K_NUM_RX_SPT_PAGES + ATH12K_NUM_TX_SPT_PAGES)
|
||||
|
||||
#define ATH12K_TX_SPT_PAGES_PER_POOL(ab) (ATH12K_NUM_POOL_TX_DESC(ab) / \
|
||||
ATH12K_MAX_SPT_ENTRIES)
|
||||
#define ATH12K_NUM_TX_SPT_PAGES(ab) (ATH12K_TX_SPT_PAGES_PER_POOL(ab) * \
|
||||
ATH12K_HW_MAX_QUEUES)
|
||||
|
||||
#define ATH12K_TX_SPT_PAGE_OFFSET 0
|
||||
#define ATH12K_RX_SPT_PAGE_OFFSET ATH12K_NUM_TX_SPT_PAGES
|
||||
#define ATH12K_RX_SPT_PAGE_OFFSET(ab) ATH12K_NUM_TX_SPT_PAGES(ab)
|
||||
|
||||
/* The SPT pages are divided for RX and TX, first block for RX
|
||||
* and remaining for TX
|
||||
*/
|
||||
#define ATH12K_NUM_TX_SPT_PAGE_START ATH12K_NUM_RX_SPT_PAGES
|
||||
#define ATH12K_NUM_TX_SPT_PAGE_START(ab) ATH12K_NUM_RX_SPT_PAGES(ab)
|
||||
|
||||
#define ATH12K_DP_RX_DESC_MAGIC 0xBABABABA
|
||||
|
||||
@@ -399,8 +404,8 @@ struct ath12k_dp {
|
||||
struct ath12k_spt_info *spt_info;
|
||||
u32 num_spt_pages;
|
||||
u32 rx_ppt_base;
|
||||
struct ath12k_rx_desc_info *rxbaddr[ATH12K_NUM_RX_SPT_PAGES];
|
||||
struct ath12k_tx_desc_info *txbaddr[ATH12K_NUM_TX_SPT_PAGES];
|
||||
struct ath12k_rx_desc_info **rxbaddr;
|
||||
struct ath12k_tx_desc_info **txbaddr;
|
||||
struct list_head rx_desc_free_list;
|
||||
/* protects the free desc list */
|
||||
spinlock_t rx_desc_lock;
|
||||
@@ -469,6 +474,7 @@ enum htt_h2t_msg_type {
|
||||
};
|
||||
|
||||
#define HTT_VER_REQ_INFO_MSG_ID GENMASK(7, 0)
|
||||
#define HTT_OPTION_TCL_METADATA_VER_V1 1
|
||||
#define HTT_OPTION_TCL_METADATA_VER_V2 2
|
||||
#define HTT_OPTION_TAG GENMASK(7, 0)
|
||||
#define HTT_OPTION_LEN GENMASK(15, 8)
|
||||
@@ -703,7 +709,8 @@ struct htt_ppdu_stats_cfg_cmd {
|
||||
} __packed;
|
||||
|
||||
#define HTT_PPDU_STATS_CFG_MSG_TYPE GENMASK(7, 0)
|
||||
#define HTT_PPDU_STATS_CFG_PDEV_ID GENMASK(15, 8)
|
||||
#define HTT_PPDU_STATS_CFG_SOC_STATS BIT(8)
|
||||
#define HTT_PPDU_STATS_CFG_PDEV_ID GENMASK(15, 9)
|
||||
#define HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK GENMASK(31, 16)
|
||||
|
||||
enum htt_ppdu_stats_tag_type {
|
||||
@@ -1559,6 +1566,8 @@ enum HTT_PPDU_STATS_PPDU_TYPE {
|
||||
#define HTT_PPDU_STATS_USER_RATE_FLAGS_DCM_M BIT(28)
|
||||
#define HTT_PPDU_STATS_USER_RATE_FLAGS_LDPC_M BIT(29)
|
||||
|
||||
#define HTT_USR_RATE_PPDU_TYPE(_val) \
|
||||
le32_get_bits(_val, HTT_PPDU_STATS_USER_RATE_INFO1_PPDU_TYPE_M)
|
||||
#define HTT_USR_RATE_PREAMBLE(_val) \
|
||||
le32_get_bits(_val, HTT_PPDU_STATS_USER_RATE_FLAGS_PREAMBLE_M)
|
||||
#define HTT_USR_RATE_BW(_val) \
|
||||
|
||||
@@ -2146,10 +2146,15 @@ static void ath12k_dp_mon_update_radiotap(struct ath12k *ar,
|
||||
struct ieee80211_rx_status *rxs)
|
||||
{
|
||||
struct ieee80211_supported_band *sband;
|
||||
s32 noise_floor;
|
||||
u8 *ptr = NULL;
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
noise_floor = ath12k_pdev_get_noise_floor(ar);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
rxs->flag |= RX_FLAG_MACTIME_START;
|
||||
rxs->signal = ppduinfo->rssi_comb + ATH12K_DEFAULT_NOISE_FLOOR;
|
||||
rxs->signal = ppduinfo->rssi_comb + noise_floor;
|
||||
rxs->nss = ppduinfo->nss + 1;
|
||||
|
||||
if (ppduinfo->userstats[ppduinfo->userid].ampdu_present) {
|
||||
@@ -3610,7 +3615,6 @@ ath12k_dp_mon_rx_update_user_stats(struct ath12k *ar,
|
||||
struct hal_rx_mon_ppdu_info *ppdu_info,
|
||||
u32 uid)
|
||||
{
|
||||
struct ath12k_sta *ahsta;
|
||||
struct ath12k_link_sta *arsta;
|
||||
struct ath12k_rx_peer_stats *rx_stats = NULL;
|
||||
struct hal_rx_user_status *user_stats = &ppdu_info->userstats[uid];
|
||||
@@ -3628,8 +3632,13 @@ ath12k_dp_mon_rx_update_user_stats(struct ath12k *ar,
|
||||
return;
|
||||
}
|
||||
|
||||
ahsta = ath12k_sta_to_ahsta(peer->sta);
|
||||
arsta = &ahsta->deflink;
|
||||
arsta = ath12k_peer_get_link_sta(ar->ab, peer);
|
||||
if (!arsta) {
|
||||
ath12k_warn(ar->ab, "link sta not found on peer %pM id %d\n",
|
||||
peer->addr, peer->peer_id);
|
||||
return;
|
||||
}
|
||||
|
||||
arsta->rssi_comb = ppdu_info->rssi_comb;
|
||||
ewma_avg_rssi_add(&arsta->avg_rssi, ppdu_info->rssi_comb);
|
||||
rx_stats = arsta->rx_stats;
|
||||
@@ -3742,7 +3751,6 @@ int ath12k_dp_mon_srng_process(struct ath12k *ar, int *budget,
|
||||
struct dp_srng *mon_dst_ring;
|
||||
struct hal_srng *srng;
|
||||
struct dp_rxdma_mon_ring *buf_ring;
|
||||
struct ath12k_sta *ahsta = NULL;
|
||||
struct ath12k_link_sta *arsta;
|
||||
struct ath12k_peer *peer;
|
||||
struct sk_buff_head skb_list;
|
||||
@@ -3868,8 +3876,15 @@ move_next:
|
||||
}
|
||||
|
||||
if (ppdu_info->reception_type == HAL_RX_RECEPTION_TYPE_SU) {
|
||||
ahsta = ath12k_sta_to_ahsta(peer->sta);
|
||||
arsta = &ahsta->deflink;
|
||||
arsta = ath12k_peer_get_link_sta(ar->ab, peer);
|
||||
if (!arsta) {
|
||||
ath12k_warn(ar->ab, "link sta not found on peer %pM id %d\n",
|
||||
peer->addr, peer->peer_id);
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
rcu_read_unlock();
|
||||
dev_kfree_skb_any(skb);
|
||||
continue;
|
||||
}
|
||||
ath12k_dp_mon_rx_update_peer_su_stats(ar, arsta,
|
||||
ppdu_info);
|
||||
} else if ((ppdu_info->fc_valid) &&
|
||||
|
||||
@@ -570,7 +570,7 @@ static int ath12k_dp_rx_pdev_srng_alloc(struct ath12k *ar)
|
||||
&dp->rxdma_mon_dst_ring[i],
|
||||
HAL_RXDMA_MONITOR_DST,
|
||||
0, mac_id + i,
|
||||
DP_RXDMA_MONITOR_DST_RING_SIZE);
|
||||
DP_RXDMA_MONITOR_DST_RING_SIZE(ab));
|
||||
if (ret) {
|
||||
ath12k_warn(ar->ab,
|
||||
"failed to setup HAL_RXDMA_MONITOR_DST\n");
|
||||
@@ -671,7 +671,7 @@ static int ath12k_dp_reo_cmd_send(struct ath12k_base *ab, struct ath12k_dp_rx_ti
|
||||
static void ath12k_dp_reo_cache_flush(struct ath12k_base *ab,
|
||||
struct ath12k_dp_rx_tid *rx_tid)
|
||||
{
|
||||
struct ath12k_hal_reo_cmd cmd = {0};
|
||||
struct ath12k_hal_reo_cmd cmd = {};
|
||||
unsigned long tot_desc_sz, desc_sz;
|
||||
int ret;
|
||||
|
||||
@@ -828,7 +828,7 @@ static void ath12k_peer_rx_tid_qref_reset(struct ath12k_base *ab, u16 peer_id, u
|
||||
void ath12k_dp_rx_peer_tid_delete(struct ath12k *ar,
|
||||
struct ath12k_peer *peer, u8 tid)
|
||||
{
|
||||
struct ath12k_hal_reo_cmd cmd = {0};
|
||||
struct ath12k_hal_reo_cmd cmd = {};
|
||||
struct ath12k_dp_rx_tid *rx_tid = &peer->rx_tid[tid];
|
||||
int ret;
|
||||
|
||||
@@ -939,7 +939,7 @@ static int ath12k_peer_rx_tid_reo_update(struct ath12k *ar,
|
||||
u32 ba_win_sz, u16 ssn,
|
||||
bool update_ssn)
|
||||
{
|
||||
struct ath12k_hal_reo_cmd cmd = {0};
|
||||
struct ath12k_hal_reo_cmd cmd = {};
|
||||
int ret;
|
||||
|
||||
cmd.addr_lo = lower_32_bits(rx_tid->qbuf.paddr_aligned);
|
||||
@@ -1204,7 +1204,7 @@ int ath12k_dp_rx_peer_pn_replay_config(struct ath12k_link_vif *arvif,
|
||||
{
|
||||
struct ath12k *ar = arvif->ar;
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct ath12k_hal_reo_cmd cmd = {0};
|
||||
struct ath12k_hal_reo_cmd cmd = {};
|
||||
struct ath12k_peer *peer;
|
||||
struct ath12k_dp_rx_tid *rx_tid;
|
||||
u8 tid;
|
||||
@@ -1418,27 +1418,33 @@ ath12k_update_per_peer_tx_stats(struct ath12k *ar,
|
||||
{
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct ath12k_peer *peer;
|
||||
struct ieee80211_sta *sta;
|
||||
struct ath12k_sta *ahsta;
|
||||
struct ath12k_link_sta *arsta;
|
||||
struct htt_ppdu_stats_user_rate *user_rate;
|
||||
struct ath12k_per_peer_tx_stats *peer_stats = &ar->peer_tx_stats;
|
||||
struct htt_ppdu_user_stats *usr_stats = &ppdu_stats->user_stats[user];
|
||||
struct htt_ppdu_stats_common *common = &ppdu_stats->common;
|
||||
int ret;
|
||||
u8 flags, mcs, nss, bw, sgi, dcm, rate_idx = 0;
|
||||
u8 flags, mcs, nss, bw, sgi, dcm, ppdu_type, rate_idx = 0;
|
||||
u32 v, succ_bytes = 0;
|
||||
u16 tones, rate = 0, succ_pkts = 0;
|
||||
u32 tx_duration = 0;
|
||||
u8 tid = HTT_PPDU_STATS_NON_QOS_TID;
|
||||
bool is_ampdu = false;
|
||||
u16 tx_retry_failed = 0, tx_retry_count = 0;
|
||||
bool is_ampdu = false, is_ofdma;
|
||||
|
||||
if (!(usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_RATE)))
|
||||
return;
|
||||
|
||||
if (usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON))
|
||||
if (usr_stats->tlv_flags & BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_COMMON)) {
|
||||
is_ampdu =
|
||||
HTT_USR_CMPLTN_IS_AMPDU(usr_stats->cmpltn_cmn.flags);
|
||||
tx_retry_failed =
|
||||
__le16_to_cpu(usr_stats->cmpltn_cmn.mpdu_tried) -
|
||||
__le16_to_cpu(usr_stats->cmpltn_cmn.mpdu_success);
|
||||
tx_retry_count =
|
||||
HTT_USR_CMPLTN_LONG_RETRY(usr_stats->cmpltn_cmn.flags) +
|
||||
HTT_USR_CMPLTN_SHORT_RETRY(usr_stats->cmpltn_cmn.flags);
|
||||
}
|
||||
|
||||
if (usr_stats->tlv_flags &
|
||||
BIT(HTT_PPDU_STATS_TAG_USR_COMPLTN_ACK_BA_STATUS)) {
|
||||
@@ -1460,6 +1466,10 @@ ath12k_update_per_peer_tx_stats(struct ath12k *ar,
|
||||
sgi = HTT_USR_RATE_GI(user_rate->rate_flags);
|
||||
dcm = HTT_USR_RATE_DCM(user_rate->rate_flags);
|
||||
|
||||
ppdu_type = HTT_USR_RATE_PPDU_TYPE(user_rate->info1);
|
||||
is_ofdma = (ppdu_type == HTT_PPDU_STATS_PPDU_TYPE_MU_OFDMA) ||
|
||||
(ppdu_type == HTT_PPDU_STATS_PPDU_TYPE_MU_MIMO_OFDMA);
|
||||
|
||||
/* Note: If host configured fixed rates and in some other special
|
||||
* cases, the broadcast/management frames are sent in different rates.
|
||||
* Firmware rate's control to be skipped for this?
|
||||
@@ -1500,12 +1510,17 @@ ath12k_update_per_peer_tx_stats(struct ath12k *ar,
|
||||
return;
|
||||
}
|
||||
|
||||
sta = peer->sta;
|
||||
ahsta = ath12k_sta_to_ahsta(sta);
|
||||
arsta = &ahsta->deflink;
|
||||
arsta = ath12k_peer_get_link_sta(ab, peer);
|
||||
if (!arsta) {
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
rcu_read_unlock();
|
||||
return;
|
||||
}
|
||||
|
||||
memset(&arsta->txrate, 0, sizeof(arsta->txrate));
|
||||
|
||||
arsta->txrate.bw = ath12k_mac_bw_to_mac80211_bw(bw);
|
||||
|
||||
switch (flags) {
|
||||
case WMI_RATE_PREAMBLE_OFDM:
|
||||
arsta->txrate.legacy = rate;
|
||||
@@ -1534,11 +1549,26 @@ ath12k_update_per_peer_tx_stats(struct ath12k *ar,
|
||||
le16_to_cpu(user_rate->ru_start) + 1;
|
||||
v = ath12k_he_ru_tones_to_nl80211_he_ru_alloc(tones);
|
||||
arsta->txrate.he_ru_alloc = v;
|
||||
if (is_ofdma)
|
||||
arsta->txrate.bw = RATE_INFO_BW_HE_RU;
|
||||
break;
|
||||
case WMI_RATE_PREAMBLE_EHT:
|
||||
arsta->txrate.mcs = mcs;
|
||||
arsta->txrate.flags = RATE_INFO_FLAGS_EHT_MCS;
|
||||
arsta->txrate.he_dcm = dcm;
|
||||
arsta->txrate.eht_gi = ath12k_mac_eht_gi_to_nl80211_eht_gi(sgi);
|
||||
tones = le16_to_cpu(user_rate->ru_end) -
|
||||
le16_to_cpu(user_rate->ru_start) + 1;
|
||||
v = ath12k_mac_eht_ru_tones_to_nl80211_eht_ru_alloc(tones);
|
||||
arsta->txrate.eht_ru_alloc = v;
|
||||
if (is_ofdma)
|
||||
arsta->txrate.bw = RATE_INFO_BW_EHT_RU;
|
||||
break;
|
||||
}
|
||||
|
||||
arsta->tx_retry_failed += tx_retry_failed;
|
||||
arsta->tx_retry_count += tx_retry_count;
|
||||
arsta->txrate.nss = nss;
|
||||
arsta->txrate.bw = ath12k_mac_bw_to_mac80211_bw(bw);
|
||||
arsta->tx_duration += tx_duration;
|
||||
memcpy(&arsta->last_txrate, &arsta->txrate, sizeof(struct rate_info));
|
||||
|
||||
@@ -2705,7 +2735,7 @@ static void ath12k_dp_rx_process_received_packets(struct ath12k_base *ab,
|
||||
int ring_id)
|
||||
{
|
||||
struct ath12k_hw_group *ag = ab->ag;
|
||||
struct ieee80211_rx_status rx_status = {0};
|
||||
struct ieee80211_rx_status rx_status = {};
|
||||
struct ath12k_skb_rxcb *rxcb;
|
||||
struct sk_buff *msdu;
|
||||
struct ath12k *ar;
|
||||
@@ -3000,7 +3030,7 @@ static int ath12k_dp_rx_h_michael_mic(struct crypto_shash *tfm, u8 *key,
|
||||
size_t data_len, u8 *mic)
|
||||
{
|
||||
SHASH_DESC_ON_STACK(desc, tfm);
|
||||
u8 mic_hdr[16] = {0};
|
||||
u8 mic_hdr[16] = {};
|
||||
u8 tid = 0;
|
||||
int ret;
|
||||
|
||||
@@ -3969,7 +3999,7 @@ static void ath12k_dp_rx_wbm_err(struct ath12k *ar,
|
||||
struct sk_buff_head *msdu_list)
|
||||
{
|
||||
struct ath12k_skb_rxcb *rxcb = ATH12K_SKB_RXCB(msdu);
|
||||
struct ieee80211_rx_status rxs = {0};
|
||||
struct ieee80211_rx_status rxs = {};
|
||||
struct ath12k_dp_rx_info rx_info;
|
||||
bool drop = true;
|
||||
|
||||
@@ -3993,6 +4023,8 @@ static void ath12k_dp_rx_wbm_err(struct ath12k *ar,
|
||||
return;
|
||||
}
|
||||
|
||||
rx_info.rx_status->flag |= RX_FLAG_SKIP_MONITOR;
|
||||
|
||||
ath12k_dp_rx_deliver_msdu(ar, napi, msdu, &rx_info);
|
||||
}
|
||||
|
||||
@@ -4314,7 +4346,7 @@ void ath12k_dp_rx_pdev_free(struct ath12k_base *ab, int mac_id)
|
||||
int ath12k_dp_rxdma_ring_sel_config_qcn9274(struct ath12k_base *ab)
|
||||
{
|
||||
struct ath12k_dp *dp = &ab->dp;
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
u32 ring_id;
|
||||
int ret;
|
||||
u32 hal_rx_desc_sz = ab->hal.hal_desc_sz;
|
||||
@@ -4355,7 +4387,7 @@ int ath12k_dp_rxdma_ring_sel_config_qcn9274(struct ath12k_base *ab)
|
||||
int ath12k_dp_rxdma_ring_sel_config_wcn7850(struct ath12k_base *ab)
|
||||
{
|
||||
struct ath12k_dp *dp = &ab->dp;
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
u32 ring_id;
|
||||
int ret = 0;
|
||||
u32 hal_rx_desc_sz = ab->hal.hal_desc_sz;
|
||||
@@ -4512,7 +4544,7 @@ int ath12k_dp_rx_alloc(struct ath12k_base *ab)
|
||||
ret = ath12k_dp_srng_setup(ab,
|
||||
&dp->rxdma_mon_buf_ring.refill_buf_ring,
|
||||
HAL_RXDMA_MONITOR_BUF, 0, 0,
|
||||
DP_RXDMA_MONITOR_BUF_RING_SIZE);
|
||||
DP_RXDMA_MONITOR_BUF_RING_SIZE(ab));
|
||||
if (ret) {
|
||||
ath12k_warn(ab, "failed to setup HAL_RXDMA_MONITOR_BUF\n");
|
||||
return ret;
|
||||
|
||||
@@ -225,7 +225,7 @@ int ath12k_dp_tx(struct ath12k *ar, struct ath12k_link_vif *arvif,
|
||||
{
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct ath12k_dp *dp = &ab->dp;
|
||||
struct hal_tx_info ti = {0};
|
||||
struct hal_tx_info ti = {};
|
||||
struct ath12k_tx_desc_info *tx_desc;
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
|
||||
struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb);
|
||||
@@ -244,6 +244,8 @@ int ath12k_dp_tx(struct ath12k *ar, struct ath12k_link_vif *arvif,
|
||||
bool msdu_ext_desc = false;
|
||||
bool add_htt_metadata = false;
|
||||
u32 iova_mask = ab->hw_params->iova_mask;
|
||||
bool is_diff_encap = false;
|
||||
bool is_null_frame = false;
|
||||
|
||||
if (test_bit(ATH12K_FLAG_CRASH_FLUSH, &ar->ab->dev_flags))
|
||||
return -ESHUTDOWN;
|
||||
@@ -334,7 +336,19 @@ tcl_ring_sel:
|
||||
|
||||
switch (ti.encap_type) {
|
||||
case HAL_TCL_ENCAP_TYPE_NATIVE_WIFI:
|
||||
ath12k_dp_tx_encap_nwifi(skb);
|
||||
is_null_frame = ieee80211_is_nullfunc(hdr->frame_control);
|
||||
if (ahvif->vif->offload_flags & IEEE80211_OFFLOAD_ENCAP_ENABLED) {
|
||||
if (skb->protocol == cpu_to_be16(ETH_P_PAE) || is_null_frame)
|
||||
is_diff_encap = true;
|
||||
|
||||
/* Firmware expects msdu ext descriptor for nwifi/raw packets
|
||||
* received in ETH mode. Without this, observed tx fail for
|
||||
* Multicast packets in ETH mode.
|
||||
*/
|
||||
msdu_ext_desc = true;
|
||||
} else {
|
||||
ath12k_dp_tx_encap_nwifi(skb);
|
||||
}
|
||||
break;
|
||||
case HAL_TCL_ENCAP_TYPE_RAW:
|
||||
if (!test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) {
|
||||
@@ -378,15 +392,25 @@ map:
|
||||
goto fail_remove_tx_buf;
|
||||
}
|
||||
|
||||
if (!test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, &ar->ab->dev_flags) &&
|
||||
!(skb_cb->flags & ATH12K_SKB_HW_80211_ENCAP) &&
|
||||
!(skb_cb->flags & ATH12K_SKB_CIPHER_SET) &&
|
||||
ieee80211_has_protected(hdr->frame_control)) {
|
||||
/* Add metadata for sw encrypted vlan group traffic */
|
||||
if ((!test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, &ar->ab->dev_flags) &&
|
||||
!(skb_cb->flags & ATH12K_SKB_HW_80211_ENCAP) &&
|
||||
!(skb_cb->flags & ATH12K_SKB_CIPHER_SET) &&
|
||||
ieee80211_has_protected(hdr->frame_control)) ||
|
||||
is_diff_encap) {
|
||||
/* Firmware is not expecting meta data for qos null
|
||||
* nwifi packet received in ETH encap mode.
|
||||
*/
|
||||
if (is_null_frame && msdu_ext_desc)
|
||||
goto skip_htt_meta;
|
||||
|
||||
/* Add metadata for sw encrypted vlan group traffic
|
||||
* and EAPOL nwifi packet received in ETH encap mode.
|
||||
*/
|
||||
add_htt_metadata = true;
|
||||
msdu_ext_desc = true;
|
||||
ti.flags0 |= u32_encode_bits(1, HAL_TCL_DATA_CMD_INFO2_TO_FW);
|
||||
ti.meta_data_flags |= HTT_TCL_META_DATA_VALID_HTT;
|
||||
skip_htt_meta:
|
||||
ti.flags0 |= u32_encode_bits(1, HAL_TCL_DATA_CMD_INFO2_TO_FW);
|
||||
ti.encap_type = HAL_TCL_ENCAP_TYPE_RAW;
|
||||
ti.encrypt_type = HAL_ENCRYPT_TYPE_OPEN;
|
||||
}
|
||||
@@ -544,7 +568,8 @@ static void
|
||||
ath12k_dp_tx_htt_tx_complete_buf(struct ath12k_base *ab,
|
||||
struct ath12k_tx_desc_params *desc_params,
|
||||
struct dp_tx_ring *tx_ring,
|
||||
struct ath12k_dp_htt_wbm_tx_status *ts)
|
||||
struct ath12k_dp_htt_wbm_tx_status *ts,
|
||||
u16 peer_id)
|
||||
{
|
||||
struct ieee80211_tx_info *info;
|
||||
struct ath12k_link_vif *arvif;
|
||||
@@ -553,6 +578,9 @@ ath12k_dp_tx_htt_tx_complete_buf(struct ath12k_base *ab,
|
||||
struct ath12k_vif *ahvif;
|
||||
struct ath12k *ar;
|
||||
struct sk_buff *msdu = desc_params->skb;
|
||||
s32 noise_floor;
|
||||
struct ieee80211_tx_status status = {};
|
||||
struct ath12k_peer *peer;
|
||||
|
||||
skb_cb = ATH12K_SKB_CB(msdu);
|
||||
info = IEEE80211_SKB_CB(msdu);
|
||||
@@ -591,16 +619,38 @@ ath12k_dp_tx_htt_tx_complete_buf(struct ath12k_base *ab,
|
||||
info->status.ack_signal = ts->ack_rssi;
|
||||
|
||||
if (!test_bit(WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT,
|
||||
ab->wmi_ab.svc_map))
|
||||
info->status.ack_signal += ATH12K_DEFAULT_NOISE_FLOOR;
|
||||
ab->wmi_ab.svc_map)) {
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
noise_floor = ath12k_pdev_get_noise_floor(ar);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
info->status.ack_signal += noise_floor;
|
||||
}
|
||||
|
||||
info->status.flags = IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
|
||||
} else {
|
||||
info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
|
||||
}
|
||||
}
|
||||
rcu_read_lock();
|
||||
spin_lock_bh(&ab->base_lock);
|
||||
peer = ath12k_peer_find_by_id(ab, peer_id);
|
||||
if (!peer || !peer->sta) {
|
||||
ath12k_dbg(ab, ATH12K_DBG_DATA,
|
||||
"dp_tx: failed to find the peer with peer_id %d\n", peer_id);
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
ieee80211_free_txskb(ath12k_ar_to_hw(ar), msdu);
|
||||
goto exit;
|
||||
} else {
|
||||
status.sta = peer->sta;
|
||||
}
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
|
||||
ieee80211_tx_status_skb(ath12k_ar_to_hw(ar), msdu);
|
||||
status.info = info;
|
||||
status.skb = msdu;
|
||||
ieee80211_tx_status_ext(ath12k_ar_to_hw(ar), &status);
|
||||
exit:
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -609,8 +659,9 @@ ath12k_dp_tx_process_htt_tx_complete(struct ath12k_base *ab, void *desc,
|
||||
struct ath12k_tx_desc_params *desc_params)
|
||||
{
|
||||
struct htt_tx_wbm_completion *status_desc;
|
||||
struct ath12k_dp_htt_wbm_tx_status ts = {0};
|
||||
struct ath12k_dp_htt_wbm_tx_status ts = {};
|
||||
enum hal_wbm_htt_tx_comp_status wbm_status;
|
||||
u16 peer_id;
|
||||
|
||||
status_desc = desc;
|
||||
|
||||
@@ -623,7 +674,11 @@ ath12k_dp_tx_process_htt_tx_complete(struct ath12k_base *ab, void *desc,
|
||||
ts.acked = (wbm_status == HAL_WBM_REL_HTT_TX_COMP_STATUS_OK);
|
||||
ts.ack_rssi = le32_get_bits(status_desc->info2,
|
||||
HTT_TX_WBM_COMP_INFO2_ACK_RSSI);
|
||||
ath12k_dp_tx_htt_tx_complete_buf(ab, desc_params, tx_ring, &ts);
|
||||
|
||||
peer_id = le32_get_bits(((struct hal_wbm_completion_ring_tx *)desc)->
|
||||
info3, HAL_WBM_COMPL_TX_INFO3_PEER_ID);
|
||||
|
||||
ath12k_dp_tx_htt_tx_complete_buf(ab, desc_params, tx_ring, &ts, peer_id);
|
||||
break;
|
||||
case HAL_WBM_REL_HTT_TX_COMP_STATUS_DROP:
|
||||
case HAL_WBM_REL_HTT_TX_COMP_STATUS_TTL:
|
||||
@@ -650,7 +705,7 @@ static void ath12k_dp_tx_update_txcompl(struct ath12k *ar, struct hal_tx_status
|
||||
struct ieee80211_sta *sta;
|
||||
struct ath12k_sta *ahsta;
|
||||
struct ath12k_link_sta *arsta;
|
||||
struct rate_info txrate = {0};
|
||||
struct rate_info txrate = {};
|
||||
u16 rate, ru_tones;
|
||||
u8 rate_idx = 0;
|
||||
int ret;
|
||||
@@ -774,6 +829,13 @@ static void ath12k_dp_tx_complete_msdu(struct ath12k *ar,
|
||||
struct ieee80211_vif *vif;
|
||||
struct ath12k_vif *ahvif;
|
||||
struct sk_buff *msdu = desc_params->skb;
|
||||
s32 noise_floor;
|
||||
struct ieee80211_tx_status status = {};
|
||||
struct ieee80211_rate_status status_rate = {};
|
||||
struct ath12k_peer *peer;
|
||||
struct ath12k_link_sta *arsta;
|
||||
struct ath12k_sta *ahsta;
|
||||
struct rate_info rate;
|
||||
|
||||
if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) {
|
||||
/* Must not happen */
|
||||
@@ -826,8 +888,13 @@ static void ath12k_dp_tx_complete_msdu(struct ath12k *ar,
|
||||
info->status.ack_signal = ts->ack_rssi;
|
||||
|
||||
if (!test_bit(WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT,
|
||||
ab->wmi_ab.svc_map))
|
||||
info->status.ack_signal += ATH12K_DEFAULT_NOISE_FLOOR;
|
||||
ab->wmi_ab.svc_map)) {
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
noise_floor = ath12k_pdev_get_noise_floor(ar);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
info->status.ack_signal += noise_floor;
|
||||
}
|
||||
|
||||
info->status.flags = IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
|
||||
}
|
||||
@@ -860,7 +927,32 @@ static void ath12k_dp_tx_complete_msdu(struct ath12k *ar,
|
||||
|
||||
ath12k_dp_tx_update_txcompl(ar, ts);
|
||||
|
||||
ieee80211_tx_status_skb(ath12k_ar_to_hw(ar), msdu);
|
||||
spin_lock_bh(&ab->base_lock);
|
||||
peer = ath12k_peer_find_by_id(ab, ts->peer_id);
|
||||
if (!peer || !peer->sta) {
|
||||
ath12k_err(ab,
|
||||
"dp_tx: failed to find the peer with peer_id %d\n",
|
||||
ts->peer_id);
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
ieee80211_free_txskb(ath12k_ar_to_hw(ar), msdu);
|
||||
goto exit;
|
||||
}
|
||||
ahsta = ath12k_sta_to_ahsta(peer->sta);
|
||||
arsta = &ahsta->deflink;
|
||||
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
|
||||
status.sta = peer->sta;
|
||||
status.info = info;
|
||||
status.skb = msdu;
|
||||
rate = arsta->last_txrate;
|
||||
|
||||
status_rate.rate_idx = rate;
|
||||
status_rate.try_count = 1;
|
||||
|
||||
status.rates = &status_rate;
|
||||
status.n_rates = 1;
|
||||
ieee80211_tx_status_ext(ath12k_ar_to_hw(ar), &status);
|
||||
|
||||
exit:
|
||||
rcu_read_unlock();
|
||||
@@ -889,6 +981,9 @@ static void ath12k_dp_tx_status_parse(struct ath12k_base *ab,
|
||||
|
||||
ts->peer_id = le32_get_bits(desc->info3, HAL_WBM_COMPL_TX_INFO3_PEER_ID);
|
||||
|
||||
ts->ack_rssi = le32_get_bits(desc->info2,
|
||||
HAL_WBM_COMPL_TX_INFO2_ACK_FRAME_RSSI);
|
||||
|
||||
if (info0 & HAL_TX_RATE_STATS_INFO0_VALID) {
|
||||
ts->pkt_type = u32_get_bits(info0, HAL_TX_RATE_STATS_INFO0_PKT_TYPE);
|
||||
ts->mcs = u32_get_bits(info0, HAL_TX_RATE_STATS_INFO0_MCS);
|
||||
@@ -906,7 +1001,7 @@ void ath12k_dp_tx_completion_handler(struct ath12k_base *ab, int ring_id)
|
||||
int hal_ring_id = dp->tx_ring[ring_id].tcl_comp_ring.ring_id;
|
||||
struct hal_srng *status_ring = &ab->hal.srng_list[hal_ring_id];
|
||||
struct ath12k_tx_desc_info *tx_desc = NULL;
|
||||
struct hal_tx_status ts = { 0 };
|
||||
struct hal_tx_status ts = {};
|
||||
struct ath12k_tx_desc_params desc_params;
|
||||
struct dp_tx_ring *tx_ring = &dp->tx_ring[ring_id];
|
||||
struct hal_wbm_release_ring *desc;
|
||||
@@ -919,7 +1014,8 @@ void ath12k_dp_tx_completion_handler(struct ath12k_base *ab, int ring_id)
|
||||
|
||||
ath12k_hal_srng_access_begin(ab, status_ring);
|
||||
|
||||
while (ATH12K_TX_COMPL_NEXT(tx_ring->tx_status_head) != tx_ring->tx_status_tail) {
|
||||
while (ATH12K_TX_COMPL_NEXT(ab, tx_ring->tx_status_head) !=
|
||||
tx_ring->tx_status_tail) {
|
||||
desc = ath12k_hal_srng_dst_get_next_entry(ab, status_ring);
|
||||
if (!desc)
|
||||
break;
|
||||
@@ -927,11 +1023,12 @@ void ath12k_dp_tx_completion_handler(struct ath12k_base *ab, int ring_id)
|
||||
memcpy(&tx_ring->tx_status[tx_ring->tx_status_head],
|
||||
desc, sizeof(*desc));
|
||||
tx_ring->tx_status_head =
|
||||
ATH12K_TX_COMPL_NEXT(tx_ring->tx_status_head);
|
||||
ATH12K_TX_COMPL_NEXT(ab, tx_ring->tx_status_head);
|
||||
}
|
||||
|
||||
if (ath12k_hal_srng_dst_peek(ab, status_ring) &&
|
||||
(ATH12K_TX_COMPL_NEXT(tx_ring->tx_status_head) == tx_ring->tx_status_tail)) {
|
||||
(ATH12K_TX_COMPL_NEXT(ab, tx_ring->tx_status_head) ==
|
||||
tx_ring->tx_status_tail)) {
|
||||
/* TODO: Process pending tx_status messages when kfifo_is_full() */
|
||||
ath12k_warn(ab, "Unable to process some of the tx_status ring desc because status_fifo is full\n");
|
||||
}
|
||||
@@ -940,12 +1037,13 @@ void ath12k_dp_tx_completion_handler(struct ath12k_base *ab, int ring_id)
|
||||
|
||||
spin_unlock_bh(&status_ring->lock);
|
||||
|
||||
while (ATH12K_TX_COMPL_NEXT(tx_ring->tx_status_tail) != tx_ring->tx_status_head) {
|
||||
while (ATH12K_TX_COMPL_NEXT(ab, tx_ring->tx_status_tail) !=
|
||||
tx_ring->tx_status_head) {
|
||||
struct hal_wbm_completion_ring_tx *tx_status;
|
||||
u32 desc_id;
|
||||
|
||||
tx_ring->tx_status_tail =
|
||||
ATH12K_TX_COMPL_NEXT(tx_ring->tx_status_tail);
|
||||
ATH12K_TX_COMPL_NEXT(ab, tx_ring->tx_status_tail);
|
||||
tx_status = &tx_ring->tx_status[tx_ring->tx_status_tail];
|
||||
ath12k_dp_tx_status_parse(ab, tx_status, &ts);
|
||||
|
||||
@@ -1182,6 +1280,7 @@ int ath12k_dp_tx_htt_h2t_ver_req_msg(struct ath12k_base *ab)
|
||||
struct sk_buff *skb;
|
||||
struct htt_ver_req_cmd *cmd;
|
||||
int len = sizeof(*cmd);
|
||||
u32 metadata_version;
|
||||
int ret;
|
||||
|
||||
init_completion(&dp->htt_tgt_version_received);
|
||||
@@ -1194,12 +1293,14 @@ int ath12k_dp_tx_htt_h2t_ver_req_msg(struct ath12k_base *ab)
|
||||
cmd = (struct htt_ver_req_cmd *)skb->data;
|
||||
cmd->ver_reg_info = le32_encode_bits(HTT_H2T_MSG_TYPE_VERSION_REQ,
|
||||
HTT_OPTION_TAG);
|
||||
metadata_version = ath12k_ftm_mode ? HTT_OPTION_TCL_METADATA_VER_V1 :
|
||||
HTT_OPTION_TCL_METADATA_VER_V2;
|
||||
|
||||
cmd->tcl_metadata_version = le32_encode_bits(HTT_TAG_TCL_METADATA_VERSION,
|
||||
HTT_OPTION_TAG) |
|
||||
le32_encode_bits(HTT_TCL_METADATA_VER_SZ,
|
||||
HTT_OPTION_LEN) |
|
||||
le32_encode_bits(HTT_OPTION_TCL_METADATA_VER_V2,
|
||||
le32_encode_bits(metadata_version,
|
||||
HTT_OPTION_VALUE);
|
||||
|
||||
ret = ath12k_htc_send(&ab->htc, dp->eid, skb);
|
||||
@@ -1245,7 +1346,7 @@ int ath12k_dp_tx_htt_h2t_ppdu_stats_req(struct ath12k *ar, u32 mask)
|
||||
cmd->msg = le32_encode_bits(HTT_H2T_MSG_TYPE_PPDU_STATS_CFG,
|
||||
HTT_PPDU_STATS_CFG_MSG_TYPE);
|
||||
|
||||
pdev_mask = 1 << (i + 1);
|
||||
pdev_mask = 1 << (i + ar->pdev_idx);
|
||||
cmd->msg |= le32_encode_bits(pdev_mask, HTT_PPDU_STATS_CFG_PDEV_ID);
|
||||
cmd->msg |= le32_encode_bits(mask, HTT_PPDU_STATS_CFG_TLV_TYPE_BITMASK);
|
||||
|
||||
@@ -1470,7 +1571,7 @@ int ath12k_dp_tx_htt_monitor_mode_ring_config(struct ath12k *ar, bool reset)
|
||||
int ath12k_dp_tx_htt_rx_monitor_mode_ring_config(struct ath12k *ar, bool reset)
|
||||
{
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {0};
|
||||
struct htt_rx_ring_tlv_filter tlv_filter = {};
|
||||
int ret, ring_id, i;
|
||||
|
||||
tlv_filter.offset_valid = false;
|
||||
|
||||
@@ -1950,7 +1950,7 @@ u32 ath12k_hal_ce_dst_status_get_length(struct hal_ce_srng_dst_status_desc *desc
|
||||
{
|
||||
u32 len;
|
||||
|
||||
len = le32_get_bits(READ_ONCE(desc->flags), HAL_CE_DST_STATUS_DESC_FLAGS_LEN);
|
||||
len = le32_get_bits(desc->flags, HAL_CE_DST_STATUS_DESC_FLAGS_LEN);
|
||||
desc->flags &= ~cpu_to_le32(HAL_CE_DST_STATUS_DESC_FLAGS_LEN);
|
||||
|
||||
return len;
|
||||
@@ -2143,13 +2143,24 @@ void *ath12k_hal_srng_src_get_next_reaped(struct ath12k_base *ab,
|
||||
|
||||
void ath12k_hal_srng_access_begin(struct ath12k_base *ab, struct hal_srng *srng)
|
||||
{
|
||||
u32 hp;
|
||||
|
||||
lockdep_assert_held(&srng->lock);
|
||||
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC)
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
|
||||
srng->u.src_ring.cached_tp =
|
||||
*(volatile u32 *)srng->u.src_ring.tp_addr;
|
||||
else
|
||||
srng->u.dst_ring.cached_hp = READ_ONCE(*srng->u.dst_ring.hp_addr);
|
||||
} else {
|
||||
hp = READ_ONCE(*srng->u.dst_ring.hp_addr);
|
||||
|
||||
if (hp != srng->u.dst_ring.cached_hp) {
|
||||
srng->u.dst_ring.cached_hp = hp;
|
||||
/* Make sure descriptor is read after the head
|
||||
* pointer.
|
||||
*/
|
||||
dma_rmb();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Update cached ring head/tail pointers to HW. ath12k_hal_srng_access_begin()
|
||||
@@ -2159,7 +2170,6 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng)
|
||||
{
|
||||
lockdep_assert_held(&srng->lock);
|
||||
|
||||
/* TODO: See if we need a write memory barrier here */
|
||||
if (srng->flags & HAL_SRNG_FLAGS_LMAC_RING) {
|
||||
/* For LMAC rings, ring pointer updates are done through FW and
|
||||
* hence written to a shared memory location that is read by FW
|
||||
@@ -2167,21 +2177,37 @@ void ath12k_hal_srng_access_end(struct ath12k_base *ab, struct hal_srng *srng)
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
|
||||
srng->u.src_ring.last_tp =
|
||||
*(volatile u32 *)srng->u.src_ring.tp_addr;
|
||||
*srng->u.src_ring.hp_addr = srng->u.src_ring.hp;
|
||||
/* Make sure descriptor is written before updating the
|
||||
* head pointer.
|
||||
*/
|
||||
dma_wmb();
|
||||
WRITE_ONCE(*srng->u.src_ring.hp_addr, srng->u.src_ring.hp);
|
||||
} else {
|
||||
srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
|
||||
*srng->u.dst_ring.tp_addr = srng->u.dst_ring.tp;
|
||||
/* Make sure descriptor is read before updating the
|
||||
* tail pointer.
|
||||
*/
|
||||
dma_mb();
|
||||
WRITE_ONCE(*srng->u.dst_ring.tp_addr, srng->u.dst_ring.tp);
|
||||
}
|
||||
} else {
|
||||
if (srng->ring_dir == HAL_SRNG_DIR_SRC) {
|
||||
srng->u.src_ring.last_tp =
|
||||
*(volatile u32 *)srng->u.src_ring.tp_addr;
|
||||
/* Assume implementation use an MMIO write accessor
|
||||
* which has the required wmb() so that the descriptor
|
||||
* is written before the updating the head pointer.
|
||||
*/
|
||||
ath12k_hif_write32(ab,
|
||||
(unsigned long)srng->u.src_ring.hp_addr -
|
||||
(unsigned long)ab->mem,
|
||||
srng->u.src_ring.hp);
|
||||
} else {
|
||||
srng->u.dst_ring.last_hp = *srng->u.dst_ring.hp_addr;
|
||||
/* Make sure descriptor is read before updating the
|
||||
* tail pointer.
|
||||
*/
|
||||
mb();
|
||||
ath12k_hif_write32(ab,
|
||||
(unsigned long)srng->u.dst_ring.tp_addr -
|
||||
(unsigned long)ab->mem,
|
||||
|
||||
@@ -14,6 +14,7 @@
|
||||
#include "hw.h"
|
||||
#include "mhi.h"
|
||||
#include "dp_rx.h"
|
||||
#include "peer.h"
|
||||
|
||||
static const guid_t wcn7850_uuid = GUID_INIT(0xf634f534, 0x6147, 0x11ec,
|
||||
0x90, 0xd6, 0x02, 0x42,
|
||||
@@ -49,6 +50,12 @@ static bool ath12k_dp_srng_is_comp_ring_qcn9274(int ring_num)
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool ath12k_is_frame_link_agnostic_qcn9274(struct ath12k_link_vif *arvif,
|
||||
struct ieee80211_mgmt *mgmt)
|
||||
{
|
||||
return ieee80211_is_action(mgmt->frame_control);
|
||||
}
|
||||
|
||||
static int ath12k_hw_mac_id_to_pdev_id_wcn7850(const struct ath12k_hw_params *hw,
|
||||
int mac_id)
|
||||
{
|
||||
@@ -74,6 +81,52 @@ static bool ath12k_dp_srng_is_comp_ring_wcn7850(int ring_num)
|
||||
return false;
|
||||
}
|
||||
|
||||
static bool ath12k_is_addba_resp_action_code(struct ieee80211_mgmt *mgmt)
|
||||
{
|
||||
if (!ieee80211_is_action(mgmt->frame_control))
|
||||
return false;
|
||||
|
||||
if (mgmt->u.action.category != WLAN_CATEGORY_BACK)
|
||||
return false;
|
||||
|
||||
if (mgmt->u.action.u.addba_resp.action_code != WLAN_ACTION_ADDBA_RESP)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static bool ath12k_is_frame_link_agnostic_wcn7850(struct ath12k_link_vif *arvif,
|
||||
struct ieee80211_mgmt *mgmt)
|
||||
{
|
||||
struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif);
|
||||
struct ath12k_hw *ah = ath12k_ar_to_ah(arvif->ar);
|
||||
struct ath12k_base *ab = arvif->ar->ab;
|
||||
__le16 fc = mgmt->frame_control;
|
||||
|
||||
spin_lock_bh(&ab->base_lock);
|
||||
if (!ath12k_peer_find_by_addr(ab, mgmt->da) &&
|
||||
!ath12k_peer_ml_find(ah, mgmt->da)) {
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
return false;
|
||||
}
|
||||
spin_unlock_bh(&ab->base_lock);
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_STATION)
|
||||
return arvif->is_up &&
|
||||
(vif->valid_links == vif->active_links) &&
|
||||
!ieee80211_is_probe_req(fc) &&
|
||||
!ieee80211_is_auth(fc) &&
|
||||
!ieee80211_is_deauth(fc) &&
|
||||
!ath12k_is_addba_resp_action_code(mgmt);
|
||||
|
||||
if (vif->type == NL80211_IFTYPE_AP)
|
||||
return !(ieee80211_is_probe_resp(fc) || ieee80211_is_auth(fc) ||
|
||||
ieee80211_is_assoc_resp(fc) || ieee80211_is_reassoc_resp(fc) ||
|
||||
ath12k_is_addba_resp_action_code(mgmt));
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
static const struct ath12k_hw_ops qcn9274_ops = {
|
||||
.get_hw_mac_from_pdev_id = ath12k_hw_qcn9274_mac_from_pdev_id,
|
||||
.mac_id_to_pdev_id = ath12k_hw_mac_id_to_pdev_id_qcn9274,
|
||||
@@ -81,6 +134,7 @@ static const struct ath12k_hw_ops qcn9274_ops = {
|
||||
.rxdma_ring_sel_config = ath12k_dp_rxdma_ring_sel_config_qcn9274,
|
||||
.get_ring_selector = ath12k_hw_get_ring_selector_qcn9274,
|
||||
.dp_srng_is_tx_comp_ring = ath12k_dp_srng_is_comp_ring_qcn9274,
|
||||
.is_frame_link_agnostic = ath12k_is_frame_link_agnostic_qcn9274,
|
||||
};
|
||||
|
||||
static const struct ath12k_hw_ops wcn7850_ops = {
|
||||
@@ -90,6 +144,7 @@ static const struct ath12k_hw_ops wcn7850_ops = {
|
||||
.rxdma_ring_sel_config = ath12k_dp_rxdma_ring_sel_config_wcn7850,
|
||||
.get_ring_selector = ath12k_hw_get_ring_selector_wcn7850,
|
||||
.dp_srng_is_tx_comp_ring = ath12k_dp_srng_is_comp_ring_wcn7850,
|
||||
.is_frame_link_agnostic = ath12k_is_frame_link_agnostic_wcn7850,
|
||||
};
|
||||
|
||||
#define ATH12K_TX_RING_MASK_0 0x1
|
||||
|
||||
@@ -16,37 +16,21 @@
|
||||
/* Target configuration defines */
|
||||
|
||||
/* Num VDEVS per radio */
|
||||
#define TARGET_NUM_VDEVS (16 + 1)
|
||||
|
||||
#define TARGET_NUM_PEERS_PDEV_SINGLE (TARGET_NUM_STATIONS_SINGLE + \
|
||||
TARGET_NUM_VDEVS)
|
||||
#define TARGET_NUM_PEERS_PDEV_DBS (TARGET_NUM_STATIONS_DBS + \
|
||||
TARGET_NUM_VDEVS)
|
||||
#define TARGET_NUM_PEERS_PDEV_DBS_SBS (TARGET_NUM_STATIONS_DBS_SBS + \
|
||||
TARGET_NUM_VDEVS)
|
||||
|
||||
/* Num of peers for Single Radio mode */
|
||||
#define TARGET_NUM_PEERS_SINGLE (TARGET_NUM_PEERS_PDEV_SINGLE)
|
||||
|
||||
/* Num of peers for DBS */
|
||||
#define TARGET_NUM_PEERS_DBS (2 * TARGET_NUM_PEERS_PDEV_DBS)
|
||||
|
||||
/* Num of peers for DBS_SBS */
|
||||
#define TARGET_NUM_PEERS_DBS_SBS (3 * TARGET_NUM_PEERS_PDEV_DBS_SBS)
|
||||
#define TARGET_NUM_VDEVS(ab) ((ab)->profile_param->num_vdevs)
|
||||
|
||||
/* Max num of stations for Single Radio mode */
|
||||
#define TARGET_NUM_STATIONS_SINGLE 512
|
||||
#define TARGET_NUM_STATIONS_SINGLE(ab) ((ab)->profile_param->max_client_single)
|
||||
|
||||
/* Max num of stations for DBS */
|
||||
#define TARGET_NUM_STATIONS_DBS 128
|
||||
#define TARGET_NUM_STATIONS_DBS(ab) ((ab)->profile_param->max_client_dbs)
|
||||
|
||||
/* Max num of stations for DBS_SBS */
|
||||
#define TARGET_NUM_STATIONS_DBS_SBS 128
|
||||
#define TARGET_NUM_STATIONS_DBS_SBS(ab) \
|
||||
((ab)->profile_param->max_client_dbs_sbs)
|
||||
|
||||
#define TARGET_NUM_STATIONS(ab, x) TARGET_NUM_STATIONS_##x(ab)
|
||||
|
||||
#define TARGET_NUM_PEERS(x) TARGET_NUM_PEERS_##x
|
||||
#define TARGET_NUM_PEER_KEYS 2
|
||||
#define TARGET_NUM_TIDS(x) (2 * TARGET_NUM_PEERS(x) + \
|
||||
4 * TARGET_NUM_VDEVS + 8)
|
||||
|
||||
#define TARGET_AST_SKID_LIMIT 16
|
||||
#define TARGET_NUM_OFFLD_PEERS 4
|
||||
@@ -246,6 +230,8 @@ struct ath12k_hw_ops {
|
||||
int (*rxdma_ring_sel_config)(struct ath12k_base *ab);
|
||||
u8 (*get_ring_selector)(struct sk_buff *skb);
|
||||
bool (*dp_srng_is_tx_comp_ring)(int ring_num);
|
||||
bool (*is_frame_link_agnostic)(struct ath12k_link_vif *arvif,
|
||||
struct ieee80211_mgmt *mgmt);
|
||||
};
|
||||
|
||||
static inline
|
||||
|
||||
+1397
-254
File diff suppressed because it is too large
Load Diff
@@ -41,6 +41,8 @@ struct ath12k_generic_iter {
|
||||
#define IEEE80211_DISABLE_VHT_MCS_SUPPORT_0_11 BIT(24)
|
||||
|
||||
#define ATH12K_CHAN_WIDTH_NUM 14
|
||||
#define ATH12K_BW_NSS_MAP_ENABLE BIT(31)
|
||||
#define ATH12K_PEER_RX_NSS_160MHZ GENMASK(2, 0)
|
||||
|
||||
#define ATH12K_TX_POWER_MAX_VAL 70
|
||||
#define ATH12K_TX_POWER_MIN_VAL 0
|
||||
@@ -59,6 +61,21 @@ struct ath12k_generic_iter {
|
||||
|
||||
#define ATH12K_NUM_MAX_ACTIVE_LINKS_PER_DEVICE 2
|
||||
|
||||
#define HECAP_PHY_SUBFMR_GET(hecap_phy) \
|
||||
u8_get_bits(hecap_phy[3], IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER)
|
||||
|
||||
#define HECAP_PHY_SUBFME_GET(hecap_phy) \
|
||||
u8_get_bits(hecap_phy[4], IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE)
|
||||
|
||||
#define HECAP_PHY_MUBFMR_GET(hecap_phy) \
|
||||
u8_get_bits(hecap_phy[4], IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER)
|
||||
|
||||
#define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
|
||||
u8_get_bits(hecap_phy[2], IEEE80211_HE_PHY_CAP2_UL_MU_FULL_MU_MIMO)
|
||||
|
||||
#define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
|
||||
u8_get_bits(hecap_phy[2], IEEE80211_HE_PHY_CAP2_UL_MU_PARTIAL_MU_MIMO)
|
||||
|
||||
enum ath12k_supported_bw {
|
||||
ATH12K_BW_20 = 0,
|
||||
ATH12K_BW_40 = 1,
|
||||
|
||||
@@ -48,7 +48,7 @@
|
||||
static const struct pci_device_id ath12k_pci_id_table[] = {
|
||||
{ PCI_VDEVICE(QCOM, QCN9274_DEVICE_ID) },
|
||||
{ PCI_VDEVICE(QCOM, WCN7850_DEVICE_ID) },
|
||||
{0}
|
||||
{}
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(pci, ath12k_pci_id_table);
|
||||
@@ -1353,7 +1353,7 @@ static void ath12k_pci_coredump_download(struct ath12k_base *ab)
|
||||
struct ath12k_tlv_dump_data *dump_tlv;
|
||||
size_t hdr_len = sizeof(*file_data);
|
||||
void *buf;
|
||||
u32 dump_seg_sz[FW_CRASH_DUMP_TYPE_MAX] = { 0 };
|
||||
u32 dump_seg_sz[FW_CRASH_DUMP_TYPE_MAX] = {};
|
||||
|
||||
ath12k_mhi_coredump(mhi_ctrl, false);
|
||||
|
||||
@@ -1595,6 +1595,7 @@ static int ath12k_pci_probe(struct pci_dev *pdev,
|
||||
ab->hal_rx_ops = &hal_rx_qcn9274_ops;
|
||||
ath12k_pci_read_hw_version(ab, &soc_hw_version_major,
|
||||
&soc_hw_version_minor);
|
||||
ab->target_mem_mode = ath12k_core_get_memory_mode(ab);
|
||||
switch (soc_hw_version_major) {
|
||||
case ATH12K_PCI_SOC_HW_VERSION_2:
|
||||
ab->hw_rev = ATH12K_HW_QCN9274_HW20;
|
||||
@@ -1618,6 +1619,7 @@ static int ath12k_pci_probe(struct pci_dev *pdev,
|
||||
ab->hal_rx_ops = &hal_rx_wcn7850_ops;
|
||||
ath12k_pci_read_hw_version(ab, &soc_hw_version_major,
|
||||
&soc_hw_version_minor);
|
||||
ab->target_mem_mode = ATH12K_QMI_MEMORY_MODE_DEFAULT;
|
||||
switch (soc_hw_version_major) {
|
||||
case ATH12K_PCI_SOC_HW_VERSION_2:
|
||||
ab->hw_rev = ATH12K_HW_WCN7850_HW20;
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
#include "peer.h"
|
||||
#include "debug.h"
|
||||
|
||||
static struct ath12k_ml_peer *ath12k_peer_ml_find(struct ath12k_hw *ah, const u8 *addr)
|
||||
struct ath12k_ml_peer *ath12k_peer_ml_find(struct ath12k_hw *ah, const u8 *addr)
|
||||
{
|
||||
struct ath12k_ml_peer *ml_peer;
|
||||
|
||||
@@ -100,6 +100,9 @@ struct ath12k_peer *ath12k_peer_find_by_id(struct ath12k_base *ab,
|
||||
|
||||
lockdep_assert_held(&ab->base_lock);
|
||||
|
||||
if (peer_id == HAL_INVALID_PEERID)
|
||||
return NULL;
|
||||
|
||||
if (peer_id & ATH12K_PEER_ML_ID_VALID)
|
||||
return ath12k_peer_find_by_ml_id(ab, peer_id);
|
||||
|
||||
|
||||
@@ -91,5 +91,33 @@ struct ath12k_peer *ath12k_peer_find_by_ast(struct ath12k_base *ab, int ast_hash
|
||||
int ath12k_peer_ml_create(struct ath12k_hw *ah, struct ieee80211_sta *sta);
|
||||
int ath12k_peer_ml_delete(struct ath12k_hw *ah, struct ieee80211_sta *sta);
|
||||
int ath12k_peer_mlo_link_peers_delete(struct ath12k_vif *ahvif, struct ath12k_sta *ahsta);
|
||||
struct ath12k_ml_peer *ath12k_peer_ml_find(struct ath12k_hw *ah,
|
||||
const u8 *addr);
|
||||
static inline
|
||||
struct ath12k_link_sta *ath12k_peer_get_link_sta(struct ath12k_base *ab,
|
||||
struct ath12k_peer *peer)
|
||||
{
|
||||
struct ath12k_sta *ahsta;
|
||||
struct ath12k_link_sta *arsta;
|
||||
|
||||
if (!peer->sta)
|
||||
return NULL;
|
||||
|
||||
ahsta = ath12k_sta_to_ahsta(peer->sta);
|
||||
if (peer->ml_id & ATH12K_PEER_ML_ID_VALID) {
|
||||
if (!(ahsta->links_map & BIT(peer->link_id))) {
|
||||
ath12k_warn(ab, "peer %pM id %d link_id %d can't found in STA link_map 0x%x\n",
|
||||
peer->addr, peer->peer_id, peer->link_id,
|
||||
ahsta->links_map);
|
||||
return NULL;
|
||||
}
|
||||
arsta = rcu_dereference(ahsta->link[peer->link_id]);
|
||||
if (!arsta)
|
||||
return NULL;
|
||||
} else {
|
||||
arsta = &ahsta->deflink;
|
||||
}
|
||||
return arsta;
|
||||
}
|
||||
|
||||
#endif /* _PEER_H_ */
|
||||
|
||||
@@ -3856,7 +3856,7 @@ int ath12k_qmi_init_service(struct ath12k_base *ab)
|
||||
memset(&ab->qmi.target_mem, 0, sizeof(struct target_mem_chunk));
|
||||
ab->qmi.ab = ab;
|
||||
|
||||
ab->qmi.target_mem_mode = ATH12K_QMI_TARGET_MEM_MODE_DEFAULT;
|
||||
ab->qmi.target_mem_mode = ab->target_mem_mode;
|
||||
ret = qmi_handle_init(&ab->qmi.handle, ATH12K_QMI_RESP_LEN_MAX,
|
||||
&ath12k_qmi_ops, ath12k_qmi_msg_handlers);
|
||||
if (ret < 0) {
|
||||
|
||||
@@ -37,7 +37,6 @@
|
||||
|
||||
#define QMI_WLANFW_MAX_DATA_SIZE_V01 6144
|
||||
#define ATH12K_FIRMWARE_MODE_OFF 4
|
||||
#define ATH12K_QMI_TARGET_MEM_MODE_DEFAULT 0
|
||||
|
||||
#define ATH12K_BOARD_ID_DEFAULT 0xFF
|
||||
|
||||
@@ -602,6 +601,11 @@ struct qmi_wlanfw_wlan_ini_resp_msg_v01 {
|
||||
struct qmi_response_type_v01 resp;
|
||||
};
|
||||
|
||||
enum ath12k_qmi_mem_mode {
|
||||
ATH12K_QMI_MEMORY_MODE_DEFAULT = 0,
|
||||
ATH12K_QMI_MEMORY_MODE_LOW_512_M,
|
||||
};
|
||||
|
||||
static inline void ath12k_qmi_set_event_block(struct ath12k_qmi *qmi, bool block)
|
||||
{
|
||||
lockdep_assert_held(&qmi->event_lock);
|
||||
|
||||
@@ -426,6 +426,29 @@ ath12k_map_fw_dfs_region(enum ath12k_dfs_region dfs_region)
|
||||
}
|
||||
}
|
||||
|
||||
static u32 ath12k_get_bw_reg_flags(u16 max_bw)
|
||||
{
|
||||
switch (max_bw) {
|
||||
case 20:
|
||||
return NL80211_RRF_NO_HT40 |
|
||||
NL80211_RRF_NO_80MHZ |
|
||||
NL80211_RRF_NO_160MHZ |
|
||||
NL80211_RRF_NO_320MHZ;
|
||||
case 40:
|
||||
return NL80211_RRF_NO_80MHZ |
|
||||
NL80211_RRF_NO_160MHZ |
|
||||
NL80211_RRF_NO_320MHZ;
|
||||
case 80:
|
||||
return NL80211_RRF_NO_160MHZ |
|
||||
NL80211_RRF_NO_320MHZ;
|
||||
case 160:
|
||||
return NL80211_RRF_NO_320MHZ;
|
||||
case 320:
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
static u32 ath12k_map_fw_reg_flags(u16 reg_flags)
|
||||
{
|
||||
u32 flags = 0;
|
||||
@@ -704,7 +727,7 @@ ath12k_reg_build_regd(struct ath12k_base *ab,
|
||||
reg_rule = reg_info->reg_rules_2g_ptr + i;
|
||||
max_bw = min_t(u16, reg_rule->max_bw,
|
||||
reg_info->max_bw_2g);
|
||||
flags = 0;
|
||||
flags = ath12k_get_bw_reg_flags(reg_info->max_bw_2g);
|
||||
ath12k_reg_update_freq_range(&ab->reg_freq_2ghz, reg_rule);
|
||||
} else if (reg_info->num_5g_reg_rules &&
|
||||
(j < reg_info->num_5g_reg_rules)) {
|
||||
@@ -718,13 +741,15 @@ ath12k_reg_build_regd(struct ath12k_base *ab,
|
||||
* BW correction if required and applies flags as
|
||||
* per other BW rule flags we pass from here
|
||||
*/
|
||||
flags = NL80211_RRF_AUTO_BW;
|
||||
flags = NL80211_RRF_AUTO_BW |
|
||||
ath12k_get_bw_reg_flags(reg_info->max_bw_5g);
|
||||
ath12k_reg_update_freq_range(&ab->reg_freq_5ghz, reg_rule);
|
||||
} else if (reg_info->is_ext_reg_event && reg_6ghz_number &&
|
||||
(k < reg_6ghz_number)) {
|
||||
reg_rule = reg_rule_6ghz + k++;
|
||||
max_bw = min_t(u16, reg_rule->max_bw, max_bw_6ghz);
|
||||
flags = NL80211_RRF_AUTO_BW;
|
||||
flags = NL80211_RRF_AUTO_BW |
|
||||
ath12k_get_bw_reg_flags(max_bw_6ghz);
|
||||
if (reg_rule->psd_flag)
|
||||
flags |= NL80211_RRF_PSD;
|
||||
ath12k_reg_update_freq_range(&ab->reg_freq_6ghz, reg_rule);
|
||||
|
||||
@@ -201,10 +201,9 @@ static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len)
|
||||
void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
|
||||
struct ath12k_wmi_resource_config_arg *config)
|
||||
{
|
||||
config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS;
|
||||
config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS(ab);
|
||||
config->num_peers = ab->num_radios *
|
||||
ath12k_core_get_max_peers_per_radio(ab);
|
||||
config->num_tids = ath12k_core_get_max_num_tids(ab);
|
||||
config->num_offload_peers = TARGET_NUM_OFFLD_PEERS;
|
||||
config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS;
|
||||
config->num_peer_keys = TARGET_NUM_PEER_KEYS;
|
||||
@@ -537,6 +536,10 @@ ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle,
|
||||
pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g);
|
||||
pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g);
|
||||
pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g);
|
||||
pdev_cap->nss_ratio_enabled =
|
||||
WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio);
|
||||
pdev_cap->nss_ratio_info =
|
||||
WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio);
|
||||
} else {
|
||||
return -EINVAL;
|
||||
}
|
||||
@@ -782,20 +785,46 @@ struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len)
|
||||
return skb;
|
||||
}
|
||||
|
||||
int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
|
||||
int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id,
|
||||
struct sk_buff *frame)
|
||||
{
|
||||
struct ath12k *ar = arvif->ar;
|
||||
struct ath12k_wmi_pdev *wmi = ar->wmi;
|
||||
struct wmi_mgmt_send_cmd *cmd;
|
||||
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame);
|
||||
struct wmi_tlv *frame_tlv;
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)frame->data;
|
||||
struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif);
|
||||
int cmd_len = sizeof(struct ath12k_wmi_mgmt_send_tx_params);
|
||||
struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)hdr;
|
||||
struct ath12k_wmi_mlo_mgmt_send_params *ml_params;
|
||||
struct ath12k_base *ab = ar->ab;
|
||||
struct wmi_tlv *frame_tlv, *tlv;
|
||||
struct ath12k_skb_cb *skb_cb;
|
||||
u32 buf_len, buf_len_aligned;
|
||||
u32 vdev_id = arvif->vdev_id;
|
||||
bool link_agnostic = false;
|
||||
struct sk_buff *skb;
|
||||
u32 buf_len;
|
||||
int ret, len;
|
||||
void *ptr;
|
||||
|
||||
buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN);
|
||||
|
||||
len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4);
|
||||
buf_len_aligned = roundup(buf_len, sizeof(u32));
|
||||
|
||||
len = sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
|
||||
|
||||
if (ieee80211_vif_is_mld(vif)) {
|
||||
skb_cb = ATH12K_SKB_CB(frame);
|
||||
if ((skb_cb->flags & ATH12K_SKB_MLO_STA) &&
|
||||
ab->hw_params->hw_ops->is_frame_link_agnostic &&
|
||||
ab->hw_params->hw_ops->is_frame_link_agnostic(arvif, mgmt)) {
|
||||
len += cmd_len + TLV_HDR_SIZE + sizeof(*ml_params);
|
||||
ath12k_generic_dbg(ATH12K_DBG_MGMT,
|
||||
"Sending Mgmt Frame fc 0x%0x as link agnostic",
|
||||
mgmt->frame_control);
|
||||
link_agnostic = true;
|
||||
}
|
||||
}
|
||||
|
||||
skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len);
|
||||
if (!skb)
|
||||
@@ -818,6 +847,28 @@ int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
|
||||
|
||||
memcpy(frame_tlv->value, frame->data, buf_len);
|
||||
|
||||
if (!link_agnostic)
|
||||
goto send;
|
||||
|
||||
ptr = skb->data + sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned;
|
||||
|
||||
tlv = ptr;
|
||||
|
||||
/* Tx params not used currently */
|
||||
tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TX_SEND_PARAMS, cmd_len);
|
||||
ptr += cmd_len;
|
||||
|
||||
tlv = ptr;
|
||||
tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*ml_params));
|
||||
ptr += TLV_HDR_SIZE;
|
||||
|
||||
ml_params = ptr;
|
||||
ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TX_SEND_PARAMS,
|
||||
sizeof(*ml_params));
|
||||
|
||||
ml_params->hw_link_id = cpu_to_le32(WMI_MGMT_LINK_AGNOSTIC_ID);
|
||||
|
||||
send:
|
||||
ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID);
|
||||
if (ret) {
|
||||
ath12k_warn(ar->ab,
|
||||
@@ -1059,15 +1110,14 @@ static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan,
|
||||
|
||||
chan->band_center_freq2 = cpu_to_le32(center_freq1);
|
||||
|
||||
} else if (arg->mode == MODE_11BE_EHT160) {
|
||||
} else if (arg->mode == MODE_11BE_EHT160 ||
|
||||
arg->mode == MODE_11AX_HE160) {
|
||||
if (arg->freq > center_freq1)
|
||||
chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40);
|
||||
else
|
||||
chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40);
|
||||
|
||||
chan->band_center_freq2 = cpu_to_le32(center_freq1);
|
||||
} else if (arg->mode == MODE_11BE_EHT80_80) {
|
||||
chan->band_center_freq2 = cpu_to_le32(arg->band_center_freq2);
|
||||
} else {
|
||||
chan->band_center_freq2 = 0;
|
||||
}
|
||||
@@ -2013,6 +2063,9 @@ int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif,
|
||||
u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST);
|
||||
cmd->ema_params = cpu_to_le32(ema_params);
|
||||
}
|
||||
cmd->feature_enable_bitmap =
|
||||
cpu_to_le32(u32_encode_bits(arvif->beacon_prot,
|
||||
WMI_BEACON_PROTECTION_EN_BIT));
|
||||
|
||||
ptr = skb->data + sizeof(*cmd);
|
||||
|
||||
@@ -2152,7 +2205,7 @@ static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd,
|
||||
cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH);
|
||||
if (arg->need_ptk_4_way) {
|
||||
cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY);
|
||||
if (!hw_crypto_disabled)
|
||||
if (!hw_crypto_disabled && arg->is_assoc)
|
||||
cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH);
|
||||
}
|
||||
if (arg->need_gtk_2_way)
|
||||
@@ -3880,7 +3933,8 @@ ath12k_wmi_copy_resource_config(struct ath12k_base *ab,
|
||||
wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters);
|
||||
wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id);
|
||||
wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config |
|
||||
WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64);
|
||||
WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 |
|
||||
WMI_RSRC_CFG_FLAG1_ACK_RSSI);
|
||||
wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version);
|
||||
wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params);
|
||||
wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count);
|
||||
@@ -6116,7 +6170,7 @@ static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab,
|
||||
}
|
||||
|
||||
static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
|
||||
u32 status)
|
||||
u32 status, u32 ack_rssi)
|
||||
{
|
||||
struct sk_buff *msdu;
|
||||
struct ieee80211_tx_info *info;
|
||||
@@ -6140,8 +6194,16 @@ static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id,
|
||||
dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE);
|
||||
|
||||
info = IEEE80211_SKB_CB(msdu);
|
||||
if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status)
|
||||
memset(&info->status, 0, sizeof(info->status));
|
||||
|
||||
/* skip tx rate update from ieee80211_status*/
|
||||
info->status.rates[0].idx = -1;
|
||||
|
||||
if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) {
|
||||
info->flags |= IEEE80211_TX_STAT_ACK;
|
||||
info->status.ack_signal = ack_rssi;
|
||||
info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID;
|
||||
}
|
||||
|
||||
if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status)
|
||||
info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED;
|
||||
@@ -6185,6 +6247,8 @@ static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab,
|
||||
param->pdev_id = ev->pdev_id;
|
||||
param->desc_id = ev->desc_id;
|
||||
param->status = ev->status;
|
||||
param->ppdu_id = ev->ppdu_id;
|
||||
param->ack_rssi = ev->ack_rssi;
|
||||
|
||||
kfree(tb);
|
||||
return 0;
|
||||
@@ -6764,7 +6828,7 @@ out:
|
||||
* before registering the hardware.
|
||||
*/
|
||||
if (ar)
|
||||
complete(&ar->regd_update_completed);
|
||||
complete_all(&ar->regd_update_completed);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -6975,12 +7039,13 @@ static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *sk
|
||||
|
||||
static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct ath12k_wmi_mgmt_rx_arg rx_ev = {0};
|
||||
struct ath12k_wmi_mgmt_rx_arg rx_ev = {};
|
||||
struct ath12k *ar;
|
||||
struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
|
||||
struct ieee80211_hdr *hdr;
|
||||
u16 fc;
|
||||
struct ieee80211_supported_band *sband;
|
||||
s32 noise_floor;
|
||||
|
||||
if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) {
|
||||
ath12k_warn(ab, "failed to extract mgmt rx event");
|
||||
@@ -7042,7 +7107,11 @@ static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
status->freq = ieee80211_channel_to_frequency(rx_ev.channel,
|
||||
status->band);
|
||||
|
||||
status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR;
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
noise_floor = ath12k_pdev_get_noise_floor(ar);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
status->signal = rx_ev.snr + noise_floor;
|
||||
status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100);
|
||||
|
||||
hdr = (struct ieee80211_hdr *)skb->data;
|
||||
@@ -7089,7 +7158,7 @@ exit:
|
||||
|
||||
static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_mgmt_tx_compl_event tx_compl_param = {0};
|
||||
struct wmi_mgmt_tx_compl_event tx_compl_param = {};
|
||||
struct ath12k *ar;
|
||||
|
||||
if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) {
|
||||
@@ -7106,7 +7175,8 @@ static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *s
|
||||
}
|
||||
|
||||
wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id),
|
||||
le32_to_cpu(tx_compl_param.status));
|
||||
le32_to_cpu(tx_compl_param.status),
|
||||
le32_to_cpu(tx_compl_param.ack_rssi));
|
||||
|
||||
ath12k_dbg(ab, ATH12K_DBG_MGMT,
|
||||
"mgmt tx compl ev pdev_id %d, desc_id %d, status %d",
|
||||
@@ -7146,7 +7216,7 @@ static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab,
|
||||
static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct ath12k *ar;
|
||||
struct wmi_scan_event scan_ev = {0};
|
||||
struct wmi_scan_event scan_ev = {};
|
||||
|
||||
if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) {
|
||||
ath12k_warn(ab, "failed to extract scan event");
|
||||
@@ -7323,7 +7393,7 @@ static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
|
||||
static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_chan_info_event ch_info_ev = {0};
|
||||
struct wmi_chan_info_event ch_info_ev = {};
|
||||
struct ath12k *ar;
|
||||
struct survey_info *survey;
|
||||
int idx;
|
||||
@@ -7471,7 +7541,7 @@ exit:
|
||||
static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_vdev_install_key_complete_arg install_key_compl = {0};
|
||||
struct wmi_vdev_install_key_complete_arg install_key_compl = {};
|
||||
struct ath12k *ar;
|
||||
|
||||
if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) {
|
||||
@@ -7511,7 +7581,8 @@ static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
|
||||
void *data)
|
||||
{
|
||||
const struct wmi_service_available_event *ev;
|
||||
u32 *wmi_ext2_service_bitmap;
|
||||
u16 wmi_ext2_service_words;
|
||||
__le32 *wmi_ext2_service_bitmap;
|
||||
int i, j;
|
||||
u16 expected_len;
|
||||
|
||||
@@ -7543,21 +7614,21 @@ static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab,
|
||||
ev->wmi_service_segment_bitmap[3]);
|
||||
break;
|
||||
case WMI_TAG_ARRAY_UINT32:
|
||||
wmi_ext2_service_bitmap = (u32 *)ptr;
|
||||
wmi_ext2_service_bitmap = (__le32 *)ptr;
|
||||
wmi_ext2_service_words = len / sizeof(u32);
|
||||
for (i = 0, j = WMI_MAX_EXT_SERVICE;
|
||||
i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE;
|
||||
i < wmi_ext2_service_words && j < WMI_MAX_EXT2_SERVICE;
|
||||
i++) {
|
||||
do {
|
||||
if (wmi_ext2_service_bitmap[i] &
|
||||
if (__le32_to_cpu(wmi_ext2_service_bitmap[i]) &
|
||||
BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32))
|
||||
set_bit(j, ab->wmi_ab.svc_map);
|
||||
} while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32);
|
||||
ath12k_dbg(ab, ATH12K_DBG_WMI,
|
||||
"wmi_ext2_service bitmap 0x%08x\n",
|
||||
__le32_to_cpu(wmi_ext2_service_bitmap[i]));
|
||||
}
|
||||
|
||||
ath12k_dbg(ab, ATH12K_DBG_WMI,
|
||||
"wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x",
|
||||
wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1],
|
||||
wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]);
|
||||
break;
|
||||
}
|
||||
return 0;
|
||||
@@ -7575,7 +7646,7 @@ static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff
|
||||
|
||||
static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0};
|
||||
struct wmi_peer_assoc_conf_arg peer_assoc_conf = {};
|
||||
struct ath12k *ar;
|
||||
|
||||
if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) {
|
||||
@@ -8521,7 +8592,7 @@ ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath12k *ar;
|
||||
struct wmi_pdev_temperature_event ev = {0};
|
||||
struct wmi_pdev_temperature_event ev = {};
|
||||
|
||||
if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) {
|
||||
ath12k_warn(ab, "failed to extract pdev temperature event");
|
||||
@@ -9319,6 +9390,229 @@ static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab,
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab,
|
||||
u16 tag, u16 len,
|
||||
const void *ptr, void *data)
|
||||
{
|
||||
const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info;
|
||||
const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info;
|
||||
struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data;
|
||||
struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg;
|
||||
s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM];
|
||||
u8 num_20mhz_segments;
|
||||
s8 min_nf, *nf_ptr;
|
||||
int i, j;
|
||||
|
||||
switch (tag) {
|
||||
case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO:
|
||||
if (len < sizeof(*param_info)) {
|
||||
ath12k_warn(ab,
|
||||
"RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
|
||||
tag, len);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
param_info = ptr;
|
||||
|
||||
param_arg.curr_bw = le32_to_cpu(param_info->curr_bw);
|
||||
param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask);
|
||||
|
||||
/* The received array is actually a 2D byte-array for per chain,
|
||||
* per 20MHz subband. Convert to 2D byte-array
|
||||
*/
|
||||
nf_ptr = ¶m_arg.nf_hw_dbm[0][0];
|
||||
|
||||
for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) {
|
||||
nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]);
|
||||
|
||||
for (j = 0; j < 4; j++) {
|
||||
*nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF;
|
||||
nf_ptr++;
|
||||
}
|
||||
}
|
||||
|
||||
switch (param_arg.curr_bw) {
|
||||
case WMI_CHAN_WIDTH_20:
|
||||
num_20mhz_segments = 1;
|
||||
break;
|
||||
case WMI_CHAN_WIDTH_40:
|
||||
num_20mhz_segments = 2;
|
||||
break;
|
||||
case WMI_CHAN_WIDTH_80:
|
||||
num_20mhz_segments = 4;
|
||||
break;
|
||||
case WMI_CHAN_WIDTH_160:
|
||||
num_20mhz_segments = 8;
|
||||
break;
|
||||
case WMI_CHAN_WIDTH_320:
|
||||
num_20mhz_segments = 16;
|
||||
break;
|
||||
default:
|
||||
ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event",
|
||||
param_arg.curr_bw);
|
||||
/* In error case, still consider the primary 20 MHz segment since
|
||||
* that would be much better than instead of dropping the whole
|
||||
* event
|
||||
*/
|
||||
num_20mhz_segments = 1;
|
||||
}
|
||||
|
||||
min_nf = ATH12K_DEFAULT_NOISE_FLOOR;
|
||||
|
||||
for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) {
|
||||
if (!(param_arg.curr_rx_chainmask & BIT(i)))
|
||||
continue;
|
||||
|
||||
for (j = 0; j < num_20mhz_segments; j++) {
|
||||
if (param_arg.nf_hw_dbm[i][j] < min_nf)
|
||||
min_nf = param_arg.nf_hw_dbm[i][j];
|
||||
}
|
||||
}
|
||||
|
||||
rssi_info->min_nf_dbm = min_nf;
|
||||
rssi_info->nf_dbm_present = true;
|
||||
break;
|
||||
case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO:
|
||||
if (len < sizeof(*temp_info)) {
|
||||
ath12k_warn(ab,
|
||||
"RSSI dbm conv subtlv 0x%x invalid len %d rcvd",
|
||||
tag, len);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
temp_info = ptr;
|
||||
rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset);
|
||||
rssi_info->temp_offset_present = true;
|
||||
break;
|
||||
default:
|
||||
ath12k_dbg(ab, ATH12K_DBG_WMI,
|
||||
"Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab,
|
||||
u16 tag, u16 len,
|
||||
const void *ptr, void *data)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
switch (tag) {
|
||||
case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM:
|
||||
/* Fixed param is already processed*/
|
||||
break;
|
||||
case WMI_TAG_ARRAY_STRUCT:
|
||||
/* len 0 is expected for array of struct when there
|
||||
* is no content of that type inside that tlv
|
||||
*/
|
||||
if (len == 0)
|
||||
return 0;
|
||||
|
||||
ret = ath12k_wmi_tlv_iter(ab, ptr, len,
|
||||
ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser,
|
||||
data);
|
||||
break;
|
||||
default:
|
||||
ath12k_dbg(ab, ATH12K_DBG_WMI,
|
||||
"Received invalid tag 0x%x for RSSI dbm conv info event\n",
|
||||
tag);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int
|
||||
ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr,
|
||||
size_t len, int *pdev_id)
|
||||
{
|
||||
struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param;
|
||||
const struct wmi_tlv *tlv;
|
||||
u16 tlv_tag;
|
||||
|
||||
if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) {
|
||||
ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
tlv = (struct wmi_tlv *)ptr;
|
||||
tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG);
|
||||
ptr += sizeof(*tlv);
|
||||
|
||||
if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) {
|
||||
ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr;
|
||||
*pdev_id = le32_to_cpu(fixed_param->pdev_id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_wmi_update_rssi_offsets(struct ath12k *ar,
|
||||
struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info)
|
||||
{
|
||||
struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info;
|
||||
|
||||
lockdep_assert_held(&ar->data_lock);
|
||||
|
||||
if (rssi_info->temp_offset_present)
|
||||
info->temp_offset = rssi_info->temp_offset;
|
||||
|
||||
if (rssi_info->nf_dbm_present)
|
||||
info->min_nf_dbm = rssi_info->min_nf_dbm;
|
||||
|
||||
info->noise_floor = info->min_nf_dbm + info->temp_offset;
|
||||
}
|
||||
|
||||
static void
|
||||
ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info;
|
||||
struct ath12k *ar;
|
||||
s32 noise_floor;
|
||||
u32 pdev_id;
|
||||
int ret;
|
||||
|
||||
ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len,
|
||||
&pdev_id);
|
||||
if (ret) {
|
||||
ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n",
|
||||
ret);
|
||||
return;
|
||||
}
|
||||
|
||||
rcu_read_lock();
|
||||
ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id);
|
||||
/* If pdev is not active, ignore the event */
|
||||
if (!ar)
|
||||
goto out_unlock;
|
||||
|
||||
ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len,
|
||||
ath12k_wmi_rssi_dbm_conv_info_event_parser,
|
||||
&rssi_info);
|
||||
if (ret) {
|
||||
ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n");
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
ath12k_wmi_update_rssi_offsets(ar, &rssi_info);
|
||||
noise_floor = ath12k_pdev_get_noise_floor(ar);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
|
||||
ath12k_dbg(ab, ATH12K_DBG_WMI,
|
||||
"RSSI noise floor updated, new value is %d dbm\n", noise_floor);
|
||||
out_unlock:
|
||||
rcu_read_unlock();
|
||||
}
|
||||
|
||||
static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
{
|
||||
struct wmi_cmd_hdr *cmd_hdr;
|
||||
@@ -9450,6 +9744,9 @@ static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb)
|
||||
case WMI_11D_NEW_COUNTRY_EVENTID:
|
||||
ath12k_reg_11d_new_cc_event(ab, skb);
|
||||
break;
|
||||
case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID:
|
||||
ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb);
|
||||
break;
|
||||
/* add Unsupported events (rare) here */
|
||||
case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID:
|
||||
case WMI_PEER_OPER_MODE_CHANGE_EVENTID:
|
||||
|
||||
@@ -222,6 +222,22 @@ enum WMI_HOST_WLAN_BAND {
|
||||
WMI_HOST_WLAN_2GHZ_5GHZ_CAP = 3,
|
||||
};
|
||||
|
||||
/* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command.
|
||||
* Used only for HE auto rate mode.
|
||||
*/
|
||||
enum {
|
||||
/* HE LTF related configuration */
|
||||
WMI_HE_AUTORATE_LTF_1X = BIT(0),
|
||||
WMI_HE_AUTORATE_LTF_2X = BIT(1),
|
||||
WMI_HE_AUTORATE_LTF_4X = BIT(2),
|
||||
|
||||
/* HE GI related configuration */
|
||||
WMI_AUTORATE_400NS_GI = BIT(8),
|
||||
WMI_AUTORATE_800NS_GI = BIT(9),
|
||||
WMI_AUTORATE_1600NS_GI = BIT(10),
|
||||
WMI_AUTORATE_3200NS_GI = BIT(11),
|
||||
};
|
||||
|
||||
enum wmi_cmd_group {
|
||||
/* 0 to 2 are reserved */
|
||||
WMI_GRP_START = 0x3,
|
||||
@@ -734,6 +750,8 @@ enum wmi_tlv_event_id {
|
||||
WMI_SERVICE_READY_EXT2_EVENTID,
|
||||
WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID =
|
||||
WMI_SERVICE_READY_EXT2_EVENTID + 4,
|
||||
WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID =
|
||||
WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID + 5,
|
||||
WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV),
|
||||
WMI_VDEV_STOPPED_EVENTID,
|
||||
WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
|
||||
@@ -1169,13 +1187,16 @@ enum wmi_tlv_vdev_param {
|
||||
WMI_VDEV_PARAM_HE_RANGE_EXT,
|
||||
WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE,
|
||||
WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME,
|
||||
WMI_VDEV_PARAM_HE_LTF = 0x74,
|
||||
WMI_VDEV_PARAM_BA_MODE = 0x7e,
|
||||
WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80,
|
||||
WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87,
|
||||
WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99,
|
||||
WMI_VDEV_PARAM_PROTOTYPE = 0x8000,
|
||||
WMI_VDEV_PARAM_BSS_COLOR,
|
||||
WMI_VDEV_PARAM_SET_HEMU_MODE,
|
||||
WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003,
|
||||
WMI_VDEV_PARAM_SET_EHT_MU_MODE = 0x8005,
|
||||
};
|
||||
|
||||
enum wmi_tlv_peer_flags {
|
||||
@@ -1992,6 +2013,9 @@ enum wmi_tlv_tag {
|
||||
WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8,
|
||||
WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD = 0x3D9,
|
||||
WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD = 0x3FB,
|
||||
WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM = 0x427,
|
||||
WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO,
|
||||
WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO,
|
||||
WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM = 0x442,
|
||||
WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM,
|
||||
WMI_TAG_MAX
|
||||
@@ -2217,6 +2241,7 @@ enum wmi_tlv_service {
|
||||
WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213,
|
||||
WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219,
|
||||
WMI_TLV_SERVICE_EXT2_MSG = 220,
|
||||
WMI_TLV_SERVICE_BEACON_PROTECTION_SUPPORT = 244,
|
||||
WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253,
|
||||
|
||||
WMI_MAX_EXT_SERVICE = 256,
|
||||
@@ -2230,6 +2255,7 @@ enum wmi_tlv_service {
|
||||
WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361,
|
||||
|
||||
WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365,
|
||||
WMI_TLV_SERVICE_ETH_OFFLOAD = 461,
|
||||
|
||||
WMI_MAX_EXT2_SERVICE,
|
||||
};
|
||||
@@ -2309,6 +2335,21 @@ enum wmi_direct_buffer_module {
|
||||
WMI_DIRECT_BUF_MAX
|
||||
};
|
||||
|
||||
/**
|
||||
* enum wmi_nss_ratio - NSS ratio received from FW during service ready ext event
|
||||
* @WMI_NSS_RATIO_1BY2_NSS: Max nss of 160MHz is equals to half of the max nss of 80MHz
|
||||
* @WMI_NSS_RATIO_3BY4_NSS: Max nss of 160MHz is equals to 3/4 of the max nss of 80MHz
|
||||
* @WMI_NSS_RATIO_1_NSS: Max nss of 160MHz is equals to the max nss of 80MHz
|
||||
* @WMI_NSS_RATIO_2_NSS: Max nss of 160MHz is equals to two times the max nss of 80MHz
|
||||
*/
|
||||
|
||||
enum wmi_nss_ratio {
|
||||
WMI_NSS_RATIO_1BY2_NSS,
|
||||
WMI_NSS_RATIO_3BY4_NSS,
|
||||
WMI_NSS_RATIO_1_NSS,
|
||||
WMI_NSS_RATIO_2_NSS
|
||||
};
|
||||
|
||||
struct ath12k_wmi_pdev_band_arg {
|
||||
u32 pdev_id;
|
||||
u32 start_freq;
|
||||
@@ -2487,6 +2528,7 @@ struct wmi_init_cmd {
|
||||
#define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4)
|
||||
#define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5)
|
||||
#define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET BIT(9)
|
||||
#define WMI_RSRC_CFG_FLAG1_ACK_RSSI BIT(18)
|
||||
|
||||
struct ath12k_wmi_resource_config_params {
|
||||
__le32 tlv_header;
|
||||
@@ -2628,6 +2670,12 @@ struct ath12k_wmi_hw_mode_cap_params {
|
||||
} __packed;
|
||||
|
||||
#define WMI_MAX_HECAP_PHY_SIZE (3)
|
||||
#define WMI_NSS_RATIO_EN_DIS_BITPOS BIT(0)
|
||||
#define WMI_NSS_RATIO_EN_DIS_GET(_val) \
|
||||
le32_get_bits(_val, WMI_NSS_RATIO_EN_DIS_BITPOS)
|
||||
#define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1)
|
||||
#define WMI_NSS_RATIO_INFO_GET(_val) \
|
||||
le32_get_bits(_val, WMI_NSS_RATIO_INFO_BITPOS)
|
||||
|
||||
/* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in
|
||||
* ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params.
|
||||
@@ -3131,31 +3179,6 @@ struct ath12k_wmi_rx_reorder_queue_remove_arg {
|
||||
#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
|
||||
#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
|
||||
|
||||
#define HECAP_PHYDWORD_0 0
|
||||
#define HECAP_PHYDWORD_1 1
|
||||
#define HECAP_PHYDWORD_2 2
|
||||
|
||||
#define HECAP_PHY_SU_BFER BIT(31)
|
||||
#define HECAP_PHY_SU_BFEE BIT(0)
|
||||
#define HECAP_PHY_MU_BFER BIT(1)
|
||||
#define HECAP_PHY_UL_MUMIMO BIT(22)
|
||||
#define HECAP_PHY_UL_MUOFDMA BIT(23)
|
||||
|
||||
#define HECAP_PHY_SUBFMR_GET(hecap_phy) \
|
||||
u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_SU_BFER)
|
||||
|
||||
#define HECAP_PHY_SUBFME_GET(hecap_phy) \
|
||||
u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_SU_BFEE)
|
||||
|
||||
#define HECAP_PHY_MUBFMR_GET(hecap_phy) \
|
||||
u32_get_bits(hecap_phy[HECAP_PHYDWORD_1], HECAP_PHY_MU_BFER)
|
||||
|
||||
#define HECAP_PHY_ULMUMIMO_GET(hecap_phy) \
|
||||
u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUMIMO)
|
||||
|
||||
#define HECAP_PHY_ULOFDMA_GET(hecap_phy) \
|
||||
u32_get_bits(hecap_phy[HECAP_PHYDWORD_0], HECAP_PHY_UL_MUOFDMA)
|
||||
|
||||
#define HE_MODE_SU_TX_BFEE BIT(0)
|
||||
#define HE_MODE_SU_TX_BFER BIT(1)
|
||||
#define HE_MODE_MU_TX_BFEE BIT(2)
|
||||
@@ -3167,8 +3190,31 @@ struct ath12k_wmi_rx_reorder_queue_remove_arg {
|
||||
#define HE_DL_MUOFDMA_ENABLE 1
|
||||
#define HE_UL_MUOFDMA_ENABLE 1
|
||||
#define HE_DL_MUMIMO_ENABLE 1
|
||||
#define HE_UL_MUMIMO_ENABLE 1
|
||||
#define HE_MU_BFEE_ENABLE 1
|
||||
#define HE_SU_BFEE_ENABLE 1
|
||||
#define HE_MU_BFER_ENABLE 1
|
||||
#define HE_SU_BFER_ENABLE 1
|
||||
|
||||
#define EHT_MODE_SU_TX_BFEE BIT(0)
|
||||
#define EHT_MODE_SU_TX_BFER BIT(1)
|
||||
#define EHT_MODE_MU_TX_BFEE BIT(2)
|
||||
#define EHT_MODE_MU_TX_BFER BIT(3)
|
||||
#define EHT_MODE_DL_OFDMA BIT(4)
|
||||
#define EHT_MODE_UL_OFDMA BIT(5)
|
||||
#define EHT_MODE_MUMIMO BIT(6)
|
||||
#define EHT_MODE_DL_OFDMA_TXBF BIT(7)
|
||||
#define EHT_MODE_DL_OFDMA_MUMIMO BIT(8)
|
||||
#define EHT_MODE_UL_OFDMA_MUMIMO BIT(9)
|
||||
|
||||
#define EHT_DL_MUOFDMA_ENABLE 1
|
||||
#define EHT_UL_MUOFDMA_ENABLE 1
|
||||
#define EHT_DL_MUMIMO_ENABLE 1
|
||||
#define EHT_UL_MUMIMO_ENABLE 1
|
||||
#define EHT_MU_BFEE_ENABLE 1
|
||||
#define EHT_SU_BFEE_ENABLE 1
|
||||
#define EHT_MU_BFER_ENABLE 1
|
||||
#define EHT_SU_BFER_ENABLE 1
|
||||
|
||||
#define HE_VHT_SOUNDING_MODE_ENABLE 1
|
||||
#define HE_SU_MU_SOUNDING_MODE_ENABLE 1
|
||||
@@ -3632,6 +3678,15 @@ struct wmi_force_fw_hang_cmd {
|
||||
__le32 delay_time_ms;
|
||||
} __packed;
|
||||
|
||||
/* Param values to be sent for WMI_VDEV_PARAM_SGI param_id
|
||||
* which are used in 11n, 11ac systems
|
||||
* @WMI_GI_800_NS - Always uses 0.8us (Long GI)
|
||||
* @WMI_GI_400_NS - Firmware switches between 0.4us (Short GI)
|
||||
* and 0.8us (Long GI) based on packet error rate.
|
||||
*/
|
||||
#define WMI_GI_800_NS 0
|
||||
#define WMI_GI_400_NS 1
|
||||
|
||||
struct wmi_vdev_set_param_cmd {
|
||||
__le32 tlv_header;
|
||||
__le32 vdev_id;
|
||||
@@ -3703,6 +3758,8 @@ struct ath12k_wmi_ftm_event {
|
||||
#define WMI_EMA_BEACON_FIRST GENMASK(23, 16)
|
||||
#define WMI_EMA_BEACON_LAST GENMASK(31, 24)
|
||||
|
||||
#define WMI_BEACON_PROTECTION_EN_BIT BIT(0)
|
||||
|
||||
struct ath12k_wmi_bcn_tmpl_ema_arg {
|
||||
u8 bcn_cnt;
|
||||
u8 bcn_index;
|
||||
@@ -3773,7 +3830,6 @@ struct wmi_vdev_install_key_arg {
|
||||
#define WMI_HOST_MAX_HE_RATE_SET 3
|
||||
#define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0
|
||||
#define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1
|
||||
#define WMI_HECAP_TXRX_MCS_NSS_IDX_80_80 2
|
||||
|
||||
#define ATH12K_WMI_MLO_MAX_PARTNER_LINKS \
|
||||
(ATH12K_WMI_MLO_MAX_LINKS + ATH12K_MAX_NUM_BRIDGE_LINKS - 1)
|
||||
@@ -3963,6 +4019,7 @@ struct wmi_scan_chan_list_cmd {
|
||||
} __packed;
|
||||
|
||||
#define WMI_MGMT_SEND_DOWNLD_LEN 64
|
||||
#define WMI_MGMT_LINK_AGNOSTIC_ID 0xFFFFFFFF
|
||||
|
||||
#define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0)
|
||||
#define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8)
|
||||
@@ -3988,7 +4045,18 @@ struct wmi_mgmt_send_cmd {
|
||||
|
||||
/* This TLV is followed by struct wmi_mgmt_frame */
|
||||
|
||||
/* Followed by struct wmi_mgmt_send_params */
|
||||
/* Followed by struct ath12k_wmi_mlo_mgmt_send_params */
|
||||
} __packed;
|
||||
|
||||
struct ath12k_wmi_mlo_mgmt_send_params {
|
||||
__le32 tlv_header;
|
||||
__le32 hw_link_id;
|
||||
} __packed;
|
||||
|
||||
struct ath12k_wmi_mgmt_send_tx_params {
|
||||
__le32 tlv_header;
|
||||
__le32 tx_param_dword0;
|
||||
__le32 tx_param_dword1;
|
||||
} __packed;
|
||||
|
||||
struct wmi_sta_powersave_mode_cmd {
|
||||
@@ -4461,6 +4529,8 @@ struct wmi_mgmt_tx_compl_event {
|
||||
__le32 desc_id;
|
||||
__le32 status;
|
||||
__le32 pdev_id;
|
||||
__le32 ppdu_id;
|
||||
__le32 ack_rssi;
|
||||
} __packed;
|
||||
|
||||
struct wmi_scan_event {
|
||||
@@ -4672,7 +4742,7 @@ enum wmi_ap_ps_peer_param {
|
||||
|
||||
#define DISABLE_SIFS_RESPONSE_TRIGGER 0
|
||||
|
||||
#define WMI_MAX_KEY_INDEX 3
|
||||
#define WMI_MAX_KEY_INDEX 7
|
||||
#define WMI_MAX_KEY_LEN 32
|
||||
|
||||
enum wmi_key_type {
|
||||
@@ -6176,6 +6246,43 @@ struct wmi_mlo_link_set_active_arg {
|
||||
struct wmi_ml_disallow_mode_bmap_arg disallow_bmap[WMI_ML_MAX_DISALLOW_BMAP_COMB];
|
||||
};
|
||||
|
||||
#define ATH12K_MAX_20MHZ_SEGMENTS 16
|
||||
#define ATH12K_MAX_NUM_ANTENNA 8
|
||||
#define ATH12K_MAX_NUM_NF_HW_DBM 32
|
||||
|
||||
struct ath12k_wmi_rssi_dbm_conv_info_fixed_params {
|
||||
__le32 pdev_id;
|
||||
} __packed;
|
||||
|
||||
struct ath12k_wmi_rssi_dbm_conv_info_params {
|
||||
__le32 curr_bw;
|
||||
__le32 curr_rx_chainmask;
|
||||
__le32 xbar_config;
|
||||
a_sle32 xlna_bypass_offset;
|
||||
a_sle32 xlna_bypass_threshold;
|
||||
a_sle32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM];
|
||||
} __packed;
|
||||
|
||||
struct ath12k_wmi_rssi_dbm_conv_temp_info_params {
|
||||
a_sle32 offset;
|
||||
} __packed;
|
||||
|
||||
struct ath12k_wmi_rssi_dbm_conv_param_arg {
|
||||
u32 curr_bw;
|
||||
u32 curr_rx_chainmask;
|
||||
u32 xbar_config;
|
||||
s32 xlna_bypass_offset;
|
||||
s32 xlna_bypass_threshold;
|
||||
s8 nf_hw_dbm[ATH12K_MAX_NUM_ANTENNA][ATH12K_MAX_20MHZ_SEGMENTS];
|
||||
};
|
||||
|
||||
struct ath12k_wmi_rssi_dbm_conv_info_arg {
|
||||
bool temp_offset_present;
|
||||
s32 temp_offset;
|
||||
bool nf_dbm_present;
|
||||
s8 min_nf_dbm;
|
||||
};
|
||||
|
||||
void ath12k_wmi_init_qcn9274(struct ath12k_base *ab,
|
||||
struct ath12k_wmi_resource_config_arg *config);
|
||||
void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
|
||||
@@ -6183,7 +6290,7 @@ void ath12k_wmi_init_wcn7850(struct ath12k_base *ab,
|
||||
int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb,
|
||||
u32 cmd_id);
|
||||
struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len);
|
||||
int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id,
|
||||
int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id,
|
||||
struct sk_buff *frame);
|
||||
int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id,
|
||||
const u8 *p2p_ie);
|
||||
|
||||
@@ -3116,10 +3116,7 @@ ath5k_combine_pwr_to_pdadc_curves(struct ath5k_hw *ah,
|
||||
pd_gain_overlap;
|
||||
|
||||
/* Force each power step to be at least 0.5 dB */
|
||||
if ((pdadc_tmp[1] - pdadc_tmp[0]) > 1)
|
||||
pwr_step = pdadc_tmp[1] - pdadc_tmp[0];
|
||||
else
|
||||
pwr_step = 1;
|
||||
pwr_step = max(pdadc_tmp[1] - pdadc_tmp[0], 1);
|
||||
|
||||
/* If pdadc_0 is negative, we need to extrapolate
|
||||
* below this pdgain by a number of pwr_steps */
|
||||
@@ -3144,11 +3141,8 @@ ath5k_combine_pwr_to_pdadc_curves(struct ath5k_hw *ah,
|
||||
continue;
|
||||
|
||||
/* Force each power step to be at least 0.5 dB */
|
||||
if ((pdadc_tmp[table_size - 1] - pdadc_tmp[table_size - 2]) > 1)
|
||||
pwr_step = pdadc_tmp[table_size - 1] -
|
||||
pdadc_tmp[table_size - 2];
|
||||
else
|
||||
pwr_step = 1;
|
||||
pwr_step = max(pdadc_tmp[table_size - 1] -
|
||||
pdadc_tmp[table_size - 2], 1);
|
||||
|
||||
/* Extrapolate above */
|
||||
while ((pdadc_0 < (s16) pdadc_n) &&
|
||||
|
||||
@@ -91,7 +91,7 @@ int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type)
|
||||
|
||||
/*
|
||||
* Turn on power to get hardware (target) version and leave power
|
||||
* on delibrately as we will boot the hardware anyway within few
|
||||
* on deliberately as we will boot the hardware anyway within few
|
||||
* seconds.
|
||||
*/
|
||||
ret = ath6kl_hif_power_on(ar);
|
||||
|
||||
@@ -513,7 +513,7 @@ static int proc_pending_irqs(struct ath6kl_device *dev, bool *done)
|
||||
out:
|
||||
/*
|
||||
* An optimization to bypass reading the IRQ status registers
|
||||
* unecessarily which can re-wake the target, if upper layers
|
||||
* unnecessarily which can re-wake the target, if upper layers
|
||||
* determine that we are in a low-throughput mode, we can rely on
|
||||
* taking another interrupt rather than re-checking the status
|
||||
* registers which can re-wake the target.
|
||||
|
||||
@@ -485,7 +485,7 @@ struct htc_endpoint_stats {
|
||||
/* count of credits received via another endpoint */
|
||||
u32 cred_from_ep0;
|
||||
|
||||
/* count of consummed credits */
|
||||
/* count of consumed credits */
|
||||
u32 cred_cosumd;
|
||||
|
||||
/* count of credits returned */
|
||||
@@ -596,7 +596,7 @@ struct htc_target {
|
||||
/* protects free_ctrl_txbuf and free_ctrl_rxbuf */
|
||||
spinlock_t htc_lock;
|
||||
|
||||
/* FIXME: does this protext rx_bufq and endpoint structures or what? */
|
||||
/* FIXME: does this protect rx_bufq and endpoint structures or what? */
|
||||
spinlock_t rx_lock;
|
||||
|
||||
/* protects endpoint->txq */
|
||||
@@ -624,7 +624,7 @@ struct htc_target {
|
||||
|
||||
int chk_irq_status_cnt;
|
||||
|
||||
/* counts the number of Tx without bundling continously per AC */
|
||||
/* counts the number of Tx without bundling continuously per AC */
|
||||
u32 ac_tx_count[WMM_NUM_AC];
|
||||
|
||||
struct {
|
||||
|
||||
@@ -938,7 +938,7 @@ static void ath6kl_htc_tx_from_queue(struct htc_target *target,
|
||||
|
||||
/*
|
||||
* if an AC has bundling disabled and no tx bundling
|
||||
* has occured continously for a certain number of TX,
|
||||
* has occurred continuously for a certain number of TX,
|
||||
* enable tx bundling for this AC
|
||||
*/
|
||||
if (!bundle_sent) {
|
||||
|
||||
@@ -718,7 +718,7 @@ static struct htc_packet *htc_lookup_tx_packet(struct htc_target *target,
|
||||
spin_lock_bh(&target->tx_lock);
|
||||
|
||||
/*
|
||||
* interate from the front of tx lookup queue
|
||||
* iterate from the front of tx lookup queue
|
||||
* this lookup should be fast since lower layers completes in-order and
|
||||
* so the completed packet should be at the head of the list generally
|
||||
*/
|
||||
|
||||
@@ -207,7 +207,7 @@ static const struct ath6kl_hw hw_list[] = {
|
||||
|
||||
/*
|
||||
* This configuration item sets the value of disconnect timeout
|
||||
* Firmware delays sending the disconnec event to the host for this
|
||||
* Firmware delays sending the disconnect event to the host for this
|
||||
* timeout after is gets disconnected from the current AP.
|
||||
* If the firmware successly roams within the disconnect timeout
|
||||
* it sends a new connect event
|
||||
@@ -221,7 +221,7 @@ struct sk_buff *ath6kl_buf_alloc(int size)
|
||||
struct sk_buff *skb;
|
||||
u16 reserved;
|
||||
|
||||
/* Add chacheline space at front and back of buffer */
|
||||
/* Add cacheline space at front and back of buffer */
|
||||
reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
|
||||
sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
|
||||
skb = dev_alloc_skb(size + reserved);
|
||||
|
||||
@@ -583,7 +583,7 @@ static int ath6kl_commit_ch_switch(struct ath6kl_vif *vif, u16 channel)
|
||||
switch (vif->nw_type) {
|
||||
case AP_NETWORK:
|
||||
/*
|
||||
* reconfigure any saved RSN IE capabilites in the beacon /
|
||||
* reconfigure any saved RSN IE capabilities in the beacon /
|
||||
* probe response to stay in sync with the supplicant.
|
||||
*/
|
||||
if (vif->rsn_capab &&
|
||||
|
||||
@@ -486,7 +486,7 @@ static void ath6kl_sdio_irq_handler(struct sdio_func *func)
|
||||
ar_sdio = sdio_get_drvdata(func);
|
||||
atomic_set(&ar_sdio->irq_handling, 1);
|
||||
/*
|
||||
* Release the host during interrups so we can pick it back up when
|
||||
* Release the host during interrupts so we can pick it back up when
|
||||
* we process commands.
|
||||
*/
|
||||
sdio_release_host(ar_sdio->func);
|
||||
|
||||
@@ -93,7 +93,7 @@ struct ath6kl_urb_context {
|
||||
#define ATH6KL_USB_EP_ADDR_APP_DATA_MP_OUT 0x03
|
||||
#define ATH6KL_USB_EP_ADDR_APP_DATA_HP_OUT 0x04
|
||||
|
||||
/* diagnostic command defnitions */
|
||||
/* diagnostic command definitions */
|
||||
#define ATH6KL_USB_CONTROL_REQ_SEND_BMI_CMD 1
|
||||
#define ATH6KL_USB_CONTROL_REQ_RECV_BMI_RESP 2
|
||||
#define ATH6KL_USB_CONTROL_REQ_DIAG_CMD 3
|
||||
@@ -882,7 +882,7 @@ static int ath6kl_usb_submit_ctrl_out(struct ath6kl_usb *ar_usb,
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* note: if successful returns number of bytes transfered */
|
||||
/* note: if successful returns number of bytes transferred */
|
||||
ret = usb_control_msg(ar_usb->udev,
|
||||
usb_sndctrlpipe(ar_usb->udev, 0),
|
||||
req,
|
||||
@@ -914,7 +914,7 @@ static int ath6kl_usb_submit_ctrl_in(struct ath6kl_usb *ar_usb,
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* note: if successful returns number of bytes transfered */
|
||||
/* note: if successful returns number of bytes transferred */
|
||||
ret = usb_control_msg(ar_usb->udev,
|
||||
usb_rcvctrlpipe(ar_usb->udev, 0),
|
||||
req,
|
||||
|
||||
@@ -2601,7 +2601,7 @@ int ath6kl_wmi_create_pstream_cmd(struct wmi *wmi, u8 if_idx,
|
||||
}
|
||||
|
||||
/*
|
||||
* Indicate activty change to driver layer only if this is the
|
||||
* Indicate activity change to driver layer only if this is the
|
||||
* first TSID to get created in this AC explicitly or an implicit
|
||||
* fat pipe is getting created.
|
||||
*/
|
||||
|
||||
@@ -655,7 +655,7 @@ enum wmi_mgmt_frame_type {
|
||||
|
||||
enum wmi_ie_field_type {
|
||||
WMI_RSN_IE_CAPB = 0x1,
|
||||
WMI_IE_FULL = 0xFF, /* indicats full IE */
|
||||
WMI_IE_FULL = 0xFF, /* indicates full IE */
|
||||
};
|
||||
|
||||
/* WMI_CONNECT_CMDID */
|
||||
@@ -1178,10 +1178,10 @@ struct wmi_create_pstream_cmd {
|
||||
__le32 sba;
|
||||
__le32 medium_time;
|
||||
|
||||
/* in octects */
|
||||
/* in octets */
|
||||
__le16 nominal_msdu;
|
||||
|
||||
/* in octects */
|
||||
/* in octets */
|
||||
__le16 max_msdu;
|
||||
|
||||
u8 traffic_class;
|
||||
@@ -1742,7 +1742,7 @@ struct wmi_scan_complete_event {
|
||||
|
||||
/*
|
||||
* Special frame receive Event.
|
||||
* Mechanism used to inform host of the receiption of the special frames.
|
||||
* Mechanism used to inform host of the reception of the special frames.
|
||||
* Consists of special frame info header followed by special frame body.
|
||||
* The 802.11 header is not included.
|
||||
*/
|
||||
@@ -1860,7 +1860,7 @@ struct wmi_target_stats {
|
||||
/*
|
||||
* WMI_RSSI_THRESHOLD_EVENTID.
|
||||
* Indicate the RSSI events to host. Events are indicated when we breach a
|
||||
* thresold value.
|
||||
* threshold value.
|
||||
*/
|
||||
enum wmi_rssi_threshold_val {
|
||||
WMI_RSSI_THRESHOLD1_ABOVE = 0,
|
||||
|
||||
@@ -16,37 +16,21 @@
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <linux/nl80211.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/nl80211.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include "ath9k.h"
|
||||
|
||||
static const struct platform_device_id ath9k_platform_id_table[] = {
|
||||
{
|
||||
.name = "ath9k",
|
||||
.driver_data = AR5416_AR9100_DEVID,
|
||||
},
|
||||
{
|
||||
.name = "ar933x_wmac",
|
||||
.driver_data = AR9300_DEVID_AR9330,
|
||||
},
|
||||
{
|
||||
.name = "ar934x_wmac",
|
||||
.driver_data = AR9300_DEVID_AR9340,
|
||||
},
|
||||
{
|
||||
.name = "qca955x_wmac",
|
||||
.driver_data = AR9300_DEVID_QCA955X,
|
||||
},
|
||||
{
|
||||
.name = "qca953x_wmac",
|
||||
.driver_data = AR9300_DEVID_AR953X,
|
||||
},
|
||||
{
|
||||
.name = "qca956x_wmac",
|
||||
.driver_data = AR9300_DEVID_QCA956X,
|
||||
},
|
||||
static const struct of_device_id ath9k_of_match_table[] = {
|
||||
{ .compatible = "qca,ar9130-wifi", .data = (void *)AR5416_AR9100_DEVID },
|
||||
{ .compatible = "qca,ar9330-wifi", .data = (void *)AR9300_DEVID_AR9330 },
|
||||
{ .compatible = "qca,ar9340-wifi", .data = (void *)AR9300_DEVID_AR9340 },
|
||||
{ .compatible = "qca,qca9530-wifi", .data = (void *)AR9300_DEVID_AR953X },
|
||||
{ .compatible = "qca,qca9550-wifi", .data = (void *)AR9300_DEVID_QCA955X },
|
||||
{ .compatible = "qca,qca9560-wifi", .data = (void *)AR9300_DEVID_QCA956X },
|
||||
{},
|
||||
};
|
||||
|
||||
@@ -71,19 +55,14 @@ static const struct ath_bus_ops ath_ahb_bus_ops = {
|
||||
|
||||
static int ath_ahb_probe(struct platform_device *pdev)
|
||||
{
|
||||
void __iomem *mem;
|
||||
struct ath_softc *sc;
|
||||
struct ieee80211_hw *hw;
|
||||
const struct platform_device_id *id = platform_get_device_id(pdev);
|
||||
int irq;
|
||||
int ret = 0;
|
||||
struct ath_softc *sc;
|
||||
struct ath_hw *ah;
|
||||
void __iomem *mem;
|
||||
char hw_name[64];
|
||||
|
||||
if (!dev_get_platdata(&pdev->dev)) {
|
||||
dev_err(&pdev->dev, "no platform data specified\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
u16 dev_id;
|
||||
int irq;
|
||||
int ret;
|
||||
|
||||
mem = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(mem)) {
|
||||
@@ -117,7 +96,8 @@ static int ath_ahb_probe(struct platform_device *pdev)
|
||||
goto err_free_hw;
|
||||
}
|
||||
|
||||
ret = ath9k_init_device(id->driver_data, sc, &ath_ahb_bus_ops);
|
||||
dev_id = (u16)(kernel_ulong_t)of_device_get_match_data(&pdev->dev);
|
||||
ret = ath9k_init_device(dev_id, sc, &ath_ahb_bus_ops);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to initialize device\n");
|
||||
goto err_irq;
|
||||
@@ -155,11 +135,11 @@ static struct platform_driver ath_ahb_driver = {
|
||||
.remove = ath_ahb_remove,
|
||||
.driver = {
|
||||
.name = "ath9k",
|
||||
.of_match_table = ath9k_of_match_table,
|
||||
},
|
||||
.id_table = ath9k_platform_id_table,
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(platform, ath9k_platform_id_table);
|
||||
MODULE_DEVICE_TABLE(of, ath9k_of_match_table);
|
||||
|
||||
int ath_ahb_init(void)
|
||||
{
|
||||
|
||||
@@ -53,7 +53,7 @@ MODULE_PARM_DESC(led_id,
|
||||
*
|
||||
* There are several buses present on the WIL6210 card.
|
||||
* Same memory areas are visible at different address on
|
||||
* the different busses. There are 3 main bus masters:
|
||||
* the different buses. There are 3 main bus masters:
|
||||
* - MAC CPU (ucode)
|
||||
* - User CPU (firmware)
|
||||
* - AHB (host)
|
||||
|
||||
@@ -3495,7 +3495,7 @@ struct wmi_aoa_meas_event {
|
||||
u8 channel;
|
||||
/* enum wmi_aoa_meas_type */
|
||||
u8 aoa_meas_type;
|
||||
/* Measurments are from RFs, defined by the mask */
|
||||
/* Measurements are from RFs, defined by the mask */
|
||||
__le32 meas_rf_mask;
|
||||
/* enum wmi_aoa_meas_status */
|
||||
u8 meas_status;
|
||||
@@ -3634,7 +3634,7 @@ struct wmi_tof_ftm_per_dest_res_event {
|
||||
__le32 tsf_sync;
|
||||
/* actual received ftm per burst */
|
||||
u8 actual_ftm_per_burst;
|
||||
/* Measurments are from RFs, defined by the mask */
|
||||
/* Measurements are from RFs, defined by the mask */
|
||||
__le32 meas_rf_mask;
|
||||
u8 reserved0[3];
|
||||
struct wmi_responder_ftm_res responder_ftm_res[];
|
||||
|
||||
Reference in New Issue
Block a user