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Miquel Raynal
1ac5ff2f2a
Describe the octal "read from cache" (1S_1S_8S, 1S_8S_8S and 1S_1D_8D_OP) and "program load" (1S_1S_8S and 1S_8S_8S) operations supported by the W35N01JW chip. There is no observable improvement between the two octal SDR modes, which anyway offered a great read speed improvement compared to single mode. flash_speed test results ran on the TI AM62A7 LP SK using a 25MHz SPI bus: * Single mode: eraseblock read speed is 2346 KiB/s page read speed is 2342 KiB/s eraseblock write speed is 2028 KiB/s page write speed is 2028 KiB/s * Octal modes: eraseblock read speed is 10801 KiB/s page read speed is 10711 KiB/s eraseblock write speed is 7335 KiB/s page write speed is 7293 KiB/s However, testing on the cadence qspi controller driver did not allow mixed modes (where SDR and DTR cycles are mixed in the same operation), thus 1S-1D-8D mode could not be tested and is provided for reference (it is anyway skipped on platforms not supporting this). It did not allow easy "update cache" tests either, so these macros are untested and given as-is. Acked-by: Tudor Ambarus <tudor.ambarus@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.