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Krishna chaitanya chundru
267643b3e3
Enable PCIe1 controller and its corresponding PHY nodes on qcs6490-rb3g2 platform. SMMU v2 has limited SID's to assign dynamic SID's with the existing logic. For now, use static iommu-map table assigning unique SID's for each port as dynamic approach needs boarder community discussions. PCIe switch connected to this board has 3 downstream ports and to the one of the downstream an embedded ethernet is connected. Assign unique SID for each downstream port and to embedded ethernet, and also reserve a SID for the endpoints which are going to be connected to the other two downstream ports. As this PCIe switch is present in this platform only update iommu-map in this platform only as other board variants might have different PCIe topology and might need different mapping. Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> Link: https://lore.kernel.org/r/20241024-enable_pcie-v2-1-e5a6f5da74e4@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.