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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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Stephen Boyd
601e5d464d
Pull Starfive clk driver updates from Conor Dooley: - Initial JH7110 clk/reset support A rake of patches, initially worked on by Emil & later picked up by Hal that add support for the sys/aon clock & reset controllers on StarFive's JH7110 SoC. This SoC is largely similar to the existing JH7100, so a bunch of refactoring is done to share as many bits as possible between the two. What's here (plus the already applied pinctrl bits) should be sufficient to boot a basic initramfs. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-jh7110-clk-reset-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: MAINTAINERS: generalise StarFive clk/reset entries reset: starfive: Add StarFive JH7110 reset driver clk: starfive: Add StarFive JH7110 always-on clock driver clk: starfive: Add StarFive JH7110 system clock driver reset: starfive: jh71x0: Use 32bit I/O on 32bit registers reset: starfive: Rename "jh7100" to "jh71x0" for the common code reset: starfive: Extract the common JH71X0 reset code reset: starfive: Factor out common JH71X0 reset code reset: Create subdirectory for StarFive drivers reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE clk: starfive: Rename "jh7100" to "jh71x0" for the common code clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h clk: starfive: Factor out common JH7100 and JH7110 code clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Linux kernel
============
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Please read the Documentation/process/changes.rst file, as it contains the
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