Commit Graph

655 Commits

Author SHA1 Message Date
Doug Gregor
cc78bb5ebf [Multi-threaded IRGen] Ensure that autolink info gets into each object file
When performing multi-threaded IRGen, all of the link libraries used
for autolinking went (only) into the first object file. If the object
files were then placed in a static archive, the autolinking would only
kick in if clients that link the static library reference something in
the first object file. This causes link failures.

Make sure that we put the autolink information into each of the object
files we create when doing multi-threaded IRGen.

Fixes the rest of rdar://162400654.
2025-11-12 11:37:19 -08:00
Nate Chandler
042579b010 [IRGen] Address-discriminate these ptrauth ents.
They are stored at an address so that address should be used to
strengthen auth.
2025-10-27 16:09:53 -07:00
Nate Chandler
df273d6f28 [IRGen] Fix copy/paste error.
The schemas for the coro frame de/alloc functions were incorrectly not
being assigned and instead the non-frame de/alloc functions were being
assigned twice.  Fix that and add more tests.

rdar://163330882
2025-10-27 15:24:51 -07:00
Jan Svoboda
7fef14853b [ClangImporter] Adjust for LLVM changes (IO sandboxing) (#85093) 2025-10-24 08:11:01 -07:00
Nate Chandler
76881b1d52 [CoroutineAccessors] Add frame de/alloc functions.
To enable ABIs which store extra info in the frame, add two new slots to
the coroutine allocator function table.  For example, a frame could have
a header containing a context pointer at a negative offset from the
address returned from `swift_coro_alloc_frame`.  The frame deallocation
function would then know to deallocate more space correspondingly.
2025-10-22 21:00:17 -07:00
Ryan Mansfield
c314fc1582 Merge pull request #84296 from rjmansfield/emit-verbose-asm
Add frontend option -verbose-asm to emit verbose assembly.
2025-10-17 12:40:42 -04:00
nate-chandler
454160bca5 Merge pull request #84831 from nate-chandler/general-coro/20251009/1
[CoroutineAccessors] Sign de/allocation functions.
2025-10-13 20:03:09 -07:00
Nate Chandler
603dc2e0b3 [CoroutineAccessors] Sign de/allocation functions.
Allocator structs are passed in to new ABI yield-once coroutines and
contain pointers to functions to de/allocate memory.  Here, those
pointers are signed.
2025-10-10 16:32:19 -07:00
Doug Gregor
ce5b1a126d Merge pull request #84392 from rjmansfield/sil-ir-extra-outputs
Add frontend options to write SIL and LLVM IR as additional compilation output
2025-10-10 12:09:38 -07:00
Chirag Ramani
5179bc9609 Add IRPGO and CSIRPGO options to Swift (#84335)
This PR introduces three new instrumentation flags and plumbs them
through to IRGen:

1. `-ir-profile-generate` - enable IR-level instrumentation.
2. `-cs-profile-generate` - enable context-sensitive IR-level
instrumentation.
3. `-ir-profile-use` - IR-level PGO input profdata file to enable
profile-guided optimization (both IRPGO and CSIRPGO)

**Context:**
https://forums.swift.org/t/ir-level-pgo-instrumentation-in-swift/82123

**Swift-driver PR:** https://github.com/swiftlang/swift-driver/pull/1992

**Tests and validation:**
This PR includes ir level verification tests, also checks few edge-cases
when `-ir-profile-use` supplied profile is either missing or is an
invalid IR profile.

However, for argument validation, linking, and generating IR profiles
that can later be consumed by -cs-profile-generate, I’ll need
corresponding swift-driver changes. Those changes are being tracked in
https://github.com/swiftlang/swift-driver/pull/1992
2025-10-09 17:41:47 -07:00
Ryan Mansfield
4cc2940619 Add frontend option -verbose-asm to emit verbose assembly.
This enables the option by default to aid readability with
-emit-assembly.
2025-10-08 16:01:13 -04:00
Ryan Mansfield
ba0ce8aea6 Add frontend options to write SIL and LLVM IR as additional compilation output.
This commit adds -sil-output-path and -ir-output-path frontend options that
allow generating SIL and LLVM IR files as supplementary outputs during normal
compilation.

These options can be useful for debugging and analysis tools
workflows that need access to intermediate compilation artifacts
without requiring separate compiler invocations.

Expected behaviour:

Primary File mode:
 - SIL: Generates one .sil file per source file
 - IR: Generates one .ll file per source file

Single-threaded WMO mode:
 - SIL: Generates one .sil file for the entire module
 - IR: Generates one .ll file for the entire module

Multi-threaded WMO mode:
 - SIL: Generates one .sil file for the entire module
 - IR: Generates separate .ll files per source file

File Maps with WMO:
 - Both SIL and IR outputs using first entry's naming, which is
   consistent with the behaviour of other supplementary outputs.

rdar://160297898
2025-10-06 15:45:49 -04:00
swift-ci
6924296975 Merge remote-tracking branch 'origin/main' into rebranch 2025-09-18 14:58:38 -07:00
Yuta Saito
9cb5e37efc [IRGen] Use PrivateLinkage for @__Swift_AST global
`.swift_ast` section is now recognized as a "metadata" section by LLVM's
object emission. On WebAssembly, metadata symbols must not appear in the
object file symbol table. Therefore, change the linkage of the
`@__Swift_AST` global from InternalLinkage to PrivateLinkage to avoid
exposing the symbol.

555eaef3ab
2025-09-17 16:10:32 +00:00
swift-ci
367f0082fc Merge remote-tracking branch 'origin/main' into rebranch 2025-07-22 22:17:45 -07:00
Anthony Latsis
b66a1aa8c5 DriverTool,IRGen: Address llvm::Target::createTargetMachine overload deprecation
See https://github.com/llvm/llvm-project/pull/130940.
2025-07-21 12:47:48 +01:00
Anthony Latsis
f8577a2731 IRGen: Address llvm::Type::getPointerTo deprecation
See https://github.com/llvm/llvm-project/pull/113331.
2025-07-21 12:37:15 +01:00
swift-ci
26f4401fbe Merge remote-tracking branch 'origin/main' into rebranch 2025-07-02 10:45:20 -07:00
Arnold Schwaighofer
b30bd40b83 Add code to create llvm::RemarkStreamer objects for all the LLVMModules in WMO mode
rdar://154403078
2025-07-01 07:19:33 -07:00
swift-ci
e3640a51ac Merge remote-tracking branch 'origin/main' into rebranch 2025-06-30 14:08:25 -07:00
Tobias Stadler
76568372f4 [IRGen] Setup LLVMRemarkStreamer using existing RemarkStreamer
Calling setupLLVMOptimizationRemarks overwrites the MainRemarkStreamer
in the LLVM context. This prevents LLVM from serializing the remark meta
information for the already emitted SIL remarks into the object file.
Without the meta information bitstream remarks don't work correctly.

Instead, emit SIL remarks and LLVM remarks to the same RemarkSerializer,
and keep the file stream alive until after CodeGen.
2025-06-12 18:31:41 +01:00
Anthony Latsis
086688c213 IRGen: Disable indirect symbol replacement with GOTPCREL for AArch64/ELF
The linkers in our Linux environments do not support this option and
fail to link the standard library.

See:
- https://github.com/swiftlang/llvm-project/pull/9339
- https://github.com/llvm/llvm-project/pull/78003
2025-06-06 14:24:00 +01:00
Anthony Latsis
c950146889 IRGen: Adjust use of llvm::PassBuilder::buildO0DefaultPipeline (parameter type changed)
Per 5445edb5d6667333f829f03932c2fc6a607e8306 (llvm-project).
2025-04-24 01:52:48 +01:00
Anthony Latsis
d15a148d09 IRGen: Conservatively adjust uses of llvm::PassBuilder::registerOptimizerLastEPCallback (lambda parameter added)
Per 390300d9f41df6ad71f0f4196ef4885d4bd5dc48 (llvm-project).
2025-04-24 01:52:48 +01:00
Anthony Latsis
f0236c262f DriverTool, IRGen: Adjust uses of llvm::Module::setTargetTriple (parameter type changed)
Per 979c275097a642e9b96c6b0a12f013c831af3a6e (llvm-project).
2025-04-24 01:52:48 +01:00
Anthony Latsis
3ef9816213 Adjust includes of moved LLVM header
Per 2ae968a0d9fb61606b020e898d884c82dd0ed8b5 (llvm-project).
2025-04-24 01:52:45 +01:00
Kuba Mracek
e80cc2fb34 [embedded] Fix compilation crash with -num-threads and -mergeable-symbols 2025-03-31 11:23:50 -07:00
Arnold Schwaighofer
767c96f1fa Add setupLLVMOptimizationRemarks 2025-03-20 08:34:46 -07:00
nate-chandler
39f58de32e Merge pull request #80033 from nate-chandler/verify-each-flag
[IRGen] Add flags to control LLVM verify-each.
2025-03-17 07:35:17 -07:00
Nate Chandler
dd8c715aa6 [IRGen] Add flags to control LLVM verify-each.
Analogous to -sil-verify-all, the new flags cause LLVM verification to
be run after each LLVM optimization pass.
2025-03-14 17:51:43 -07:00
Nate Chandler
6581fec9e1 [CoroutineAccessors] PtrAuth. 2025-03-07 11:46:51 -08:00
Kuba Mracek
119d6e27d4 [IRGen] Expose an -Xfrontend flag to disable the LLVM MergeFunctions pass 2025-02-24 09:05:22 -08:00
Finagolfin
c69a12ce39 [android] Use emulated thread-local storage for API 28 and earlier
Android before API 29 and a few other platforms don't support native TLS, so
fall back to LLVM's emulated TLS there, just like clang does. Also, make sure
`-Xcc -f{no-,}emulated-tls` flags passed in are applied to control what the
Swift compiler does.
2024-12-30 23:07:58 +05:30
Antonio Frighetto
377c03fa7e [Driver][Frontend] Introduce load-pass-plugin option
Allow dynamic loading of LLVM passes via `load-pass-plugin`
option passed to the Swift compiler driver.
2024-11-07 17:25:24 +01:00
Kavon Farvardin
19e593bc07 PGO: new -debug-info-for-profiling frontend flag
This achieves the same as clang's `-fdebug-info-for-profiling`, which
emits DWARF discriminators to aid in narrowing-down which basic block
corresponds to a particular instruction address. This is particularly
useful for sampling-based profiling.

rdar://135443278
2024-11-01 11:59:54 -07:00
Kavon Farvardin
2b01714fba PGO: new -profile-sample-use= frontend flag
This is meant to match clang's `-fprofile-sample-use=` and accepts a
file with the same format.

rdar://135443278
2024-11-01 11:59:54 -07:00
swift-ci
8a2edbc4c5 Merge remote-tracking branch 'origin/main' into rebranch 2024-10-11 17:05:06 -07:00
Nate Chandler
df1c4f6b25 [CoroutineAccessors] Add new SILFnTy CoroKind.
For `modify` and `read` coroutines, produce SILFunctionType's whose
coroutineKind is ::YieldOnce2.
2024-10-11 08:25:02 -07:00
swift-ci
753b917274 Merge remote-tracking branch 'origin/main' into rebranch 2024-09-25 05:36:07 -07:00
Slava Pestov
0cd27bf7d9 IRGen: Add a FrontendStatsTracer
We didn't measure time spent in IRGen in multi-threaded mode previously.
2024-09-23 17:12:45 -04:00
Ben Barham
a7b50f357f Merge remote-tracking branch 'origin/main' into manual-main-merge
Conflicts:
  - `lib/Driver/ToolChains.cpp` conflicting with the `addAllArgs` rename
    for multiple options
2024-09-16 13:53:18 -07:00
Arnold Schwaighofer
eaf90dff38 IRGen: Add metadata for async funclets denoting frame entry and frame exists
Adds sections `__TEXT,__swift_as_entry`, and `__TEXT,__swift_as_ret` that
contain relative pointers to async functlets modelling async function entries,
and function returns, respectively.

Emission of the sections can be trigger with the frontend option
`-Xfrontend -enable-async-frame-push-pop-metadata`.

This is done by:

* IRGen adding a `async_entry` function attribute to async functions.
* LLVM's coroutine splitting identifying continuation funclets that
  model the return from an async function call by adding the function
  attribute `async_ret`.  (see #llvm-project/pull/9204)
* An LLVM pass that keys off these two function attribute and emits the
  metadata into the above mention sections.

rdar://134460666
2024-09-03 08:44:16 -07:00
swift-ci
aa1688e468 Merge remote-tracking branch 'origin/main' into rebranch 2024-08-25 18:34:28 -07:00
Kavon Farvardin
1c3ef6c51d ColdSplit: avoid with -Osize
Based on prior evaluation, this optimization always increases code
size. It splits out blocks and introduces calls, which always adds
extra instructions to shuffle values for calling conventions and
to make the actual call/return. Apple clang avoids the optimization
in `-Oz`, which I think is pretty close to what Swift's `-Osize`
really means.
2024-08-25 13:56:58 -07:00
Ben Barham
467e528200 Merge remote-tracking branch 'origin/main' into manual-rebranch-merge
Conflicts:
  - `lib/Serialization/ModuleFormat.h` bumped version to account for
    differences between main and rebranch.
2024-08-09 15:22:39 -07:00
Kavon Farvardin
9d69f2bceb Merge pull request #75382 from kavon/static-branch-prediction
Throws Prediction + HotColdSplitting
2024-08-09 15:24:22 -04:00
Kavon Farvardin
11e8bb8759 IRGen: -enable-split-cold-code frontend feature 2024-08-09 12:09:29 -04:00
swift-ci
f1ea924a51 Merge remote-tracking branch 'origin/main' into rebranch 2024-07-24 10:14:18 -07:00
Allan Shortlidge
bb8a837dcf IRGen: Honor -target-variant flag for zippered macCatalyst binaries. 2024-07-23 17:00:10 -07:00
swift-ci
81a582e9f7 Merge remote-tracking branch 'origin/main' into rebranch 2024-07-15 15:34:55 -07:00