It turns out that on some targets we generate a call to initialize a
SIMD vector from a Builtin.Vec, even though everything is transparent,
so the checks for the return using a specific value were too fragile.
rdar://153260158
There's no reason for these to ever be calls, so they should be
transparent instead of just aEIC. Also adds concrete versions of
comparisons with scalars, and filecheck tests to make sure these
generate 1-2 instruction sequences in release on arm64 (x86_64 is a
little trickier to test due to frame pointers, but if we get the right
codgen on arm64, in practice we do well on x86_64 for these too).
Also makes filecheck patterns for repeating initializers a bit more
robust.
WIP to add more overloads to optimize SIMD codegen on concrete types.
Here we do:
- init(repeating:)
- init(lowHalf:highHalf:)
These are always inlined, even in debug, since LLVM knows how to lower
them to one or two instructions on the targets that we care about.
