6 Commits

Author	SHA1	Message	Date
Pavel Yaskevich	6519d99736	[Mangling/ABI] NFC: Fix SILGen tests to reflect label mangling changes	2017-12-18 15:44:24 -08:00
Joe Shajrawi	2c03144436	Add support for function_entry_count Profile counter	2017-09-26 11:10:52 -07:00
Joe Shajrawi	e6d139c97d	PGO: enable Opt IR tests	2017-09-26 10:54:01 -07:00
Vedant Kumar	8bcd5af1aa	[SwiftPGO] Add a PGO+SIL test at -O	2017-09-26 10:54:01 -07:00
Vedant Kumar	089ea4a52a	[SwiftPGO] Lower counts attached to CondBranchInst into IR ... This passes profile information down to llvm.	2017-09-26 10:54:01 -07:00
Vedant Kumar	3685bd961e	[SwiftPGO] Move counts attached to If{Expr,Stmt} into SIL ... Specifically, load profiler counts corresponding to 'if' AST nodes and attach them to the corresponding CondBranchInst's in SIL. This is done using dirty tricks and isn't tested well enough :(. - Hack the SIL printer to make profile count loading testable. - Hack the profiler's counter map to store the indices of parent region counters in entries for 'else stmts' and 'else exprs'. It's too early to hack up the SILOptimizer to propagate profile counts. It doesn't seem too hard, but I definitely don't know the code well enough to write tests for it :(. So that's still a TODO. Next, we should be able to produce some acutual llvm branch_weight metadata!	2017-09-26 10:54:01 -07:00