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923689c2b4
Non-embedded Darwin targets reserve the first 4GB of address space. All other targets reserve 4KB of address space. Make Embedded Darwin targets only reserve the first 4KB (as with other targets), since they aren't in userspace. Fixes rdar://158981013.
280 lines
9.8 KiB
C++
280 lines
9.8 KiB
C++
//===--- SwiftTargetInfo.cpp ----------------------------------------------===//
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//
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// This source file is part of the Swift.org open source project
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//
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// Copyright (c) 2014 - 2017 Apple Inc. and the Swift project authors
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// Licensed under Apache License v2.0 with Runtime Library Exception
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//
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// See https://swift.org/LICENSE.txt for license information
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// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines the SwiftTargetInfo abstract base class. This class
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// provides an interface to target-dependent attributes of interest to Swift.
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//
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//===----------------------------------------------------------------------===//
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#include "SwiftTargetInfo.h"
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#include "IRGenModule.h"
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#include "llvm/TargetParser/Triple.h"
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#include "llvm/IR/DataLayout.h"
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#include "swift/ABI/System.h"
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#include "swift/AST/ASTContext.h"
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#include "swift/AST/IRGenOptions.h"
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#include "swift/Basic/Platform.h"
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using namespace swift;
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using namespace irgen;
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/// Initialize a bit vector to be equal to the given bit-mask.
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static void setToMask(SpareBitVector &bits, unsigned size, uint64_t mask) {
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bits.clear();
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bits.add(size, mask);
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}
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/// Configures target-specific information for arm64 platforms.
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static void configureARM64(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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if (triple.isAndroid()) {
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setToMask(target.PointerSpareBits, 64,
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SWIFT_ABI_ANDROID_ARM64_SWIFT_SPARE_BITS_MASK);
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setToMask(target.ObjCPointerReservedBits, 64,
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SWIFT_ABI_ANDROID_ARM64_OBJC_RESERVED_BITS_MASK);
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} else {
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setToMask(target.PointerSpareBits, 64,
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SWIFT_ABI_ARM64_SWIFT_SPARE_BITS_MASK);
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setToMask(target.ObjCPointerReservedBits, 64,
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SWIFT_ABI_ARM64_OBJC_RESERVED_BITS_MASK);
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}
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setToMask(target.IsObjCPointerBit, 64, SWIFT_ABI_ARM64_IS_OBJC_BIT);
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// Non-embedded Darwin reserves the low 4GB of address space.
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if (triple.isOSDarwin() &&
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!IGM.getSwiftModule()->getASTContext().LangOpts.hasFeature(
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Feature::Embedded)) {
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target.LeastValidPointerValue =
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SWIFT_ABI_DARWIN_ARM64_LEAST_VALID_POINTER;
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}
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// arm64 has no special objc_msgSend variants, not even stret.
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target.ObjCUseStret = false;
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// arm64 requires marker assembly for objc_retainAutoreleasedReturnValue.
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target.ObjCRetainAutoreleasedReturnValueMarker =
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"mov\tfp, fp\t\t// marker for objc_retainAutoreleaseReturnValue";
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// arm64 requires ISA-masking.
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target.ObjCUseISAMask = true;
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// arm64 tops out at 56 effective bits of address space and reserves the high
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// half for the kernel.
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target.SwiftRetainIgnoresNegativeValues = true;
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target.UsableSwiftAsyncContextAddrIntrinsic = true;
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}
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/// Configures target-specific information for arm64_32 platforms.
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static void configureARM64_32(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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setToMask(target.PointerSpareBits, 32,
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SWIFT_ABI_ARM_SWIFT_SPARE_BITS_MASK);
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// arm64_32 has no special objc_msgSend variants, not even stret.
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target.ObjCUseStret = false;
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// arm64_32 requires marker assembly for objc_retainAutoreleasedReturnValue.
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target.ObjCRetainAutoreleasedReturnValueMarker =
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"mov\tfp, fp\t\t// marker for objc_retainAutoreleaseReturnValue";
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setToMask(target.IsObjCPointerBit, 32, SWIFT_ABI_ARM_IS_OBJC_BIT);
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target.ObjCHasOpaqueISAs = true;
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}
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/// Configures target-specific information for x86-64 platforms.
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static void configureX86_64(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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setToMask(target.PointerSpareBits, 64,
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SWIFT_ABI_X86_64_SWIFT_SPARE_BITS_MASK);
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setToMask(target.IsObjCPointerBit, 64, SWIFT_ABI_X86_64_IS_OBJC_BIT);
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if (triple.isSimulatorEnvironment()) {
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setToMask(target.ObjCPointerReservedBits, 64,
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SWIFT_ABI_X86_64_SIMULATOR_OBJC_RESERVED_BITS_MASK);
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} else {
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setToMask(target.ObjCPointerReservedBits, 64,
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SWIFT_ABI_X86_64_OBJC_RESERVED_BITS_MASK);
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}
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if (triple.isOSDarwin() &&
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!IGM.getSwiftModule()->getASTContext().LangOpts.hasFeature(
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Feature::Embedded)) {
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target.LeastValidPointerValue =
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SWIFT_ABI_DARWIN_X86_64_LEAST_VALID_POINTER;
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}
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// x86-64 has every objc_msgSend variant known to humankind.
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target.ObjCUseFPRet = true;
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target.ObjCUseFP2Ret = true;
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// x86-64 requires ISA-masking.
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target.ObjCUseISAMask = true;
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// x86-64 only has 48 effective bits of address space and reserves the high
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// half for the kernel.
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target.SwiftRetainIgnoresNegativeValues = true;
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target.UsableSwiftAsyncContextAddrIntrinsic = true;
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}
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/// Configures target-specific information for 32-bit x86 platforms.
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static void configureX86(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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setToMask(target.PointerSpareBits, 32,
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SWIFT_ABI_I386_SWIFT_SPARE_BITS_MASK);
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// x86 uses objc_msgSend_fpret but not objc_msgSend_fp2ret.
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target.ObjCUseFPRet = true;
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setToMask(target.IsObjCPointerBit, 32, SWIFT_ABI_I386_IS_OBJC_BIT);
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}
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/// Configures target-specific information for 32-bit arm platforms.
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static void configureARM(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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setToMask(target.PointerSpareBits, 32,
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SWIFT_ABI_ARM_SWIFT_SPARE_BITS_MASK);
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// ARM requires marker assembly for objc_retainAutoreleasedReturnValue.
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target.ObjCRetainAutoreleasedReturnValueMarker =
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"mov\tr7, r7\t\t// marker for objc_retainAutoreleaseReturnValue";
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// armv7k has opaque ISAs which must go through the ObjC runtime.
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if (triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v7k)
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target.ObjCHasOpaqueISAs = true;
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setToMask(target.IsObjCPointerBit, 32, SWIFT_ABI_ARM_IS_OBJC_BIT);
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}
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/// Configures target-specific information for powerpc platforms.
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static void configurePowerPC(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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setToMask(target.PointerSpareBits, 32,
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SWIFT_ABI_POWERPC_SWIFT_SPARE_BITS_MASK);
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}
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/// Configures target-specific information for powerpc64 platforms.
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static void configurePowerPC64(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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setToMask(target.PointerSpareBits, 64,
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SWIFT_ABI_POWERPC64_SWIFT_SPARE_BITS_MASK);
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}
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/// Configures target-specific information for SystemZ platforms.
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static void configureSystemZ(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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setToMask(target.PointerSpareBits, 64,
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SWIFT_ABI_S390X_SWIFT_SPARE_BITS_MASK);
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setToMask(target.ObjCPointerReservedBits, 64,
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SWIFT_ABI_S390X_OBJC_RESERVED_BITS_MASK);
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setToMask(target.IsObjCPointerBit, 64, SWIFT_ABI_S390X_IS_OBJC_BIT);
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target.SwiftRetainIgnoresNegativeValues = true;
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}
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/// Configures target-specific information for wasm32 platforms.
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static void configureWasm32(IRGenModule &IGM, const llvm::Triple &triple,
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SwiftTargetInfo &target) {
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target.LeastValidPointerValue =
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SWIFT_ABI_WASM32_LEAST_VALID_POINTER;
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}
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/// Configure a default target.
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SwiftTargetInfo::SwiftTargetInfo(
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llvm::Triple::ObjectFormatType outputObjectFormat,
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unsigned numPointerBits)
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: OutputObjectFormat(outputObjectFormat),
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HeapObjectAlignment(numPointerBits / 8),
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LeastValidPointerValue(SWIFT_ABI_DEFAULT_LEAST_VALID_POINTER)
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{
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setToMask(PointerSpareBits, numPointerBits,
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SWIFT_ABI_DEFAULT_SWIFT_SPARE_BITS_MASK);
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setToMask(ObjCPointerReservedBits, numPointerBits,
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SWIFT_ABI_DEFAULT_OBJC_RESERVED_BITS_MASK);
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setToMask(FunctionPointerSpareBits, numPointerBits,
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SWIFT_ABI_DEFAULT_FUNCTION_SPARE_BITS_MASK);
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if (numPointerBits == 64) {
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ReferencePoisonDebugValue =
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SWIFT_ABI_DEFAULT_REFERENCE_POISON_DEBUG_VALUE_64;
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} else {
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ReferencePoisonDebugValue =
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SWIFT_ABI_DEFAULT_REFERENCE_POISON_DEBUG_VALUE_32;
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}
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}
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SwiftTargetInfo SwiftTargetInfo::get(IRGenModule &IGM) {
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const llvm::Triple &triple = IGM.Context.LangOpts.Target;
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auto pointerSize = IGM.DataLayout.getPointerSizeInBits();
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// Prepare generic target information.
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SwiftTargetInfo target(triple.getObjectFormat(), pointerSize);
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// On Apple platforms, we implement "once" using dispatch_once,
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// which exposes a barrier-free inline path with -1 as the "done" value.
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if (triple.isOSDarwin())
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target.OnceDonePredicateValue = -1L;
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// Other platforms use std::call_once() and we don't
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// assume that they have a barrier-free inline fast path.
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switch (triple.getArch()) {
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case llvm::Triple::x86_64:
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configureX86_64(IGM, triple, target);
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break;
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case llvm::Triple::x86:
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configureX86(IGM, triple, target);
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break;
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case llvm::Triple::arm:
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case llvm::Triple::thumb:
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configureARM(IGM, triple, target);
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break;
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case llvm::Triple::aarch64:
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case llvm::Triple::aarch64_32:
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if (triple.getArchName() == "arm64_32")
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configureARM64_32(IGM, triple, target);
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else
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configureARM64(IGM, triple, target);
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break;
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case llvm::Triple::ppc:
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configurePowerPC(IGM, triple, target);
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break;
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case llvm::Triple::ppc64:
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case llvm::Triple::ppc64le:
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configurePowerPC64(IGM, triple, target);
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break;
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case llvm::Triple::systemz:
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configureSystemZ(IGM, triple, target);
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break;
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case llvm::Triple::wasm32:
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configureWasm32(IGM, triple, target);
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break;
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default:
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// FIXME: Complain here? Default target info is unlikely to be correct.
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break;
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}
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if (IGM.getOptions().CustomLeastValidPointerValue != 0)
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target.LeastValidPointerValue = IGM.getOptions().CustomLeastValidPointerValue;
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return target;
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}
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bool SwiftTargetInfo::hasObjCTaggedPointers() const {
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return ObjCPointerReservedBits.any();
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}
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