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ef8825bfe6
LLVM has removed llvm::Optional, move over to std::optional. Also clang-format to fix up all the renamed #includes.
118 lines
3.9 KiB
C++
118 lines
3.9 KiB
C++
//===- GlobalARCSequenceDataflow.h - ARC Sequence Flow Analysis -*- C++ -*-===//
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//
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// This source file is part of the Swift.org open source project
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//
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// Copyright (c) 2014 - 2017 Apple Inc. and the Swift project authors
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// Licensed under Apache License v2.0 with Runtime Library Exception
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//
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// See https://swift.org/LICENSE.txt for license information
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// See https://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
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//
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//===----------------------------------------------------------------------===//
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#ifndef SWIFT_SILOPTIMIZER_PASSMANAGER_ARC_GLOBALARCSEQUENCEDATAFLOW_H
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#define SWIFT_SILOPTIMIZER_PASSMANAGER_ARC_GLOBALARCSEQUENCEDATAFLOW_H
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#include "RefCountState.h"
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#include "swift/Basic/BlotMapVector.h"
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#include "swift/Basic/NullablePtr.h"
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#include "swift/SILOptimizer/Analysis/PostOrderAnalysis.h"
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#include "swift/SILOptimizer/Analysis/ProgramTerminationAnalysis.h"
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#include "llvm/ADT/MapVector.h"
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#include <optional>
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namespace swift {
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class SILFunction;
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class AliasAnalysis;
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} // end swift namespace
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namespace swift {
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/// A class that implements the ARC sequence data flow.
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class ARCSequenceDataflowEvaluator {
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public:
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// Forward declaration of private classes that are opaque in this header.
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class ARCBBStateInfoHandle;
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class ARCBBStateInfo;
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class ARCBBState;
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private:
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/// The SILFunction that we are applying the dataflow to.
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SILFunction &F;
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/// The alias analysis that we are using for alias queries.
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AliasAnalysis *AA;
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/// The post order analysis we are using for computing post orders, reverse
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/// post orders.
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PostOrderAnalysis *POA;
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/// An analysis which computes the identity root of a SILValue(), i.e. the
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/// dominating origin SILValue of the reference count that by retaining or
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/// releasing this value one is affecting.
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RCIdentityFunctionInfo *RCIA;
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/// An analysis to get the epilogue ARC instructions.
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EpilogueARCFunctionInfo *EAFI;
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/// The map from dataflow terminating decrements -> increment dataflow state.
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BlotMapVector<SILInstruction *, TopDownRefCountState> &DecToIncStateMap;
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/// The map from dataflow terminating increment -> decrement dataflow state.
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BlotMapVector<SILInstruction *, BottomUpRefCountState> &IncToDecStateMap;
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llvm::BumpPtrAllocator Allocator;
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ImmutablePointerSetFactory<SILInstruction *> SetFactory;
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/// Stashed BB information.
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std::unique_ptr<ARCBBStateInfo> BBStateInfo;
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public:
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ARCSequenceDataflowEvaluator(
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SILFunction &F, AliasAnalysis *AA, PostOrderAnalysis *POA,
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RCIdentityFunctionInfo *RCIA, EpilogueARCFunctionInfo *EAFI,
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ProgramTerminationFunctionInfo *PTFI,
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BlotMapVector<SILInstruction *, TopDownRefCountState> &DecToIncStateMap,
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BlotMapVector<SILInstruction *, BottomUpRefCountState> &IncToDecStateMap);
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~ARCSequenceDataflowEvaluator();
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/// Run the dataflow evaluator.
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bool run(bool FreezePostDomReleases);
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/// Clear all of the states we are tracking for the various basic blocks.
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void clear();
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SILFunction *getFunction() const { return &F; }
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private:
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/// Perform the bottom up data flow.
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bool processBottomUp(bool freezePostDomReleases);
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/// Perform the top down dataflow.
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bool processTopDown();
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/// Merge in the BottomUp state of any successors of DataHandle.getBB() into
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/// DataHandle.getState().
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void mergeSuccessors(ARCBBStateInfoHandle &DataHandle);
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/// Merge in the TopDown state of any predecessors of DataHandle.getBB() into
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/// DataHandle.getState().
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void mergePredecessors(ARCBBStateInfoHandle &DataHandle);
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bool processBBBottomUp(ARCBBState &BBState,
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bool FreezeOwnedArgEpilogueReleases);
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bool processBBTopDown(ARCBBState &BBState);
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void computePostDominatingConsumedArgMap();
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std::optional<ARCBBStateInfoHandle> getBottomUpBBState(SILBasicBlock *BB);
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std::optional<ARCBBStateInfoHandle> getTopDownBBState(SILBasicBlock *BB);
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void dumpDataflowResults();
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};
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} // end swift namespace
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#endif
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