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34a4075116
Recent changes added support for resiliently-sized enums, and enums resilient to changes in implementation strategy. This patch adds resilient case numbering, fixing the problem where adding new payload cases would break existing code by changing the numbering of no-payload cases. The problem is that internally, enum cases are numbered with payload cases coming first, followed by no-payload cases. While each list is itself in declaration order, with new additions coming at the end, we need to partition it to give us a fast runtime test for "is this a payload or no-payload case index." The resilient numbering strategy used here is that the getEnumTag and destructiveInjectEnumTag value witness functions now take a tag index in the range [-ElementsWithPayload..ElementsWithNoPayload-1]. Payload elements are numbered in *reverse* declaration order, so adding new payload cases yields decreasing tag indices, and adding new no-payload cases yields increasing tag indices, allowing use sites to be resilient. This adds the adjustment between 'fragile' and 'resilient' tag indices in a somewhat unsatisfying manner, because the calculation could be pushed down further into EnumImplStrategy, simplifying both the IRGen code and the generated IR. I'll clean this up later. In the meantime, clean up some other stuff in GenEnum.cpp, mostly abstracting code that walks cases.
433 lines
18 KiB
C++
433 lines
18 KiB
C++
//===--- GenEnum.h - Swift IR Generation For 'enum' Types -------*- C++ -*-===//
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//
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// This source file is part of the Swift.org open source project
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//
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// Copyright (c) 2014 - 2016 Apple Inc. and the Swift project authors
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// Licensed under Apache License v2.0 with Runtime Library Exception
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//
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// See http://swift.org/LICENSE.txt for license information
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// See http://swift.org/CONTRIBUTORS.txt for the list of Swift project authors
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//
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//===----------------------------------------------------------------------===//
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#ifndef __SWIFT_IRGen_GenEnum_H__
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#define __SWIFT_IRGen_GenEnum_H__
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#include "TypeInfo.h"
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namespace llvm {
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class BasicBlock;
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class ConstantInt;
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class StructType;
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class Type;
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class Value;
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}
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namespace swift {
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class EnumElementDecl;
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namespace irgen {
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class EnumPayload;
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class EnumPayloadSchema;
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class IRGenFunction;
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class TypeConverter;
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/// \brief Emit the dispatch branch(es) for an address-only enum.
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void emitSwitchAddressOnlyEnumDispatch(IRGenFunction &IGF,
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SILType enumTy,
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Address enumAddr,
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ArrayRef<std::pair<EnumElementDecl*,
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llvm::BasicBlock*>> dests,
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llvm::BasicBlock *defaultDest);
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/// \brief Injects a case and its associated data, if any, into a loadable enum
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/// value.
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void emitInjectLoadableEnum(IRGenFunction &IGF,
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SILType enumTy,
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EnumElementDecl *theCase,
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Explosion &data,
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Explosion &out);
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/// \brief Extracts the associated data for an enum case. This is an unchecked
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/// operation; the input enum value must be of the given case.
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void emitProjectLoadableEnum(IRGenFunction &IGF,
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SILType enumTy,
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Explosion &inData,
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EnumElementDecl *theCase,
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Explosion &out);
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/// \brief Projects the address of the associated data for a case inside a
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/// enum, to which a new data value can be stored.
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Address emitProjectEnumAddressForStore(IRGenFunction &IGF,
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SILType enumTy,
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Address enumAddr,
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EnumElementDecl *theCase);
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/// \brief Projects the address of the associated data for a case inside a
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/// enum, clearing any tag bits interleaved into the data area, so that the
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/// value inside can be loaded. Does not check that the enum has a value of the
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/// given case.
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Address emitDestructiveProjectEnumAddressForLoad(IRGenFunction &IGF,
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SILType enumTy,
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Address enumAddr,
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EnumElementDecl *theCase);
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/// \brief Stores the tag bits for an enum case to the given address, overlaying
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/// the data (if any) stored there.
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void emitStoreEnumTagToAddress(IRGenFunction &IGF,
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SILType enumTy,
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Address enumAddr,
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EnumElementDecl *theCase);
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/// Interleave the occupiedValue and spareValue bits, taking a bit from one
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/// or the other at each position based on the spareBits mask.
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APInt
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interleaveSpareBits(IRGenModule &IGM, const SpareBitVector &spareBits,
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unsigned bits, unsigned spareValue, unsigned occupiedValue);
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/// A version of the above where the tag value is dynamic.
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EnumPayload interleaveSpareBits(IRGenFunction &IGF,
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const EnumPayloadSchema &schema,
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const SpareBitVector &spareBitVector,
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llvm::Value *value);
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/// Gather spare bits into the low bits of a smaller integer value.
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llvm::Value *emitGatherSpareBits(IRGenFunction &IGF,
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const SpareBitVector &spareBitMask,
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llvm::Value *spareBits,
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unsigned resultLowBit,
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unsigned resultBitWidth);
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/// Scatter spare bits from the low bits of a smaller integer value.
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llvm::Value *emitScatterSpareBits(IRGenFunction &IGF,
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const SpareBitVector &spareBitMask,
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llvm::Value *packedBits,
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unsigned packedLowBit);
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/// An implementation strategy for an enum, which handles how the enum is
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/// laid out and how to perform TypeInfo operations on values of the enum.
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class EnumImplStrategy {
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public:
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struct Element {
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EnumElementDecl *decl;
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const TypeInfo *ti;
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const TypeInfo *origTI;
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};
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enum TypeInfoKind {
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Opaque, ///< The enum has a NonFixedTypeInfo.
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Fixed, ///< The enum has a FixedTypeInfo.
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Loadable, ///< The enum has a LoadableTypeInfo.
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};
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protected:
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std::vector<Element> ElementsWithPayload;
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std::vector<Element> ElementsWithNoPayload;
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IRGenModule &IGM;
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const TypeInfo *TI = nullptr;
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TypeInfoKind TIK;
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IsFixedSize_t AlwaysFixedSize;
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unsigned NumElements;
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EnumImplStrategy(IRGenModule &IGM,
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TypeInfoKind tik,
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IsFixedSize_t alwaysFixedSize,
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unsigned NumElements,
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std::vector<Element> &&ElementsWithPayload,
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std::vector<Element> &&ElementsWithNoPayload)
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: ElementsWithPayload(std::move(ElementsWithPayload)),
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ElementsWithNoPayload(std::move(ElementsWithNoPayload)),
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IGM(IGM), TIK(tik), AlwaysFixedSize(alwaysFixedSize),
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NumElements(NumElements)
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{}
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/// Save the TypeInfo created for the enum.
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TypeInfo *registerEnumTypeInfo(TypeInfo *mutableTI) {
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TI = mutableTI;
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return mutableTI;
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}
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/// Constructs a TypeInfo for an enum of the best possible kind for its
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/// layout, FixedEnumTypeInfo or LoadableEnumTypeInfo.
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TypeInfo *getFixedEnumTypeInfo(llvm::StructType *T, Size S, SpareBitVector SB,
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Alignment A, IsPOD_t isPOD,
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IsBitwiseTakable_t isBT);
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public:
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virtual ~EnumImplStrategy() { }
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/// Construct a layout strategy appropriate to the enum type.
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static EnumImplStrategy *get(TypeConverter &TC,
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SILType Type,
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EnumDecl *theEnum);
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/// Given an incomplete StructType for the enum, completes layout of the
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/// storage type, calculates its size and alignment, and produces the
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/// TypeInfo for the enum.
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virtual TypeInfo *completeEnumTypeLayout(TypeConverter &TC,
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SILType Type,
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EnumDecl *theEnum,
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llvm::StructType *enumTy) = 0;
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const TypeInfo &getTypeInfo() const {
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assert(TI);
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return *TI;
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}
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llvm::StructType *getStorageType() const {
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return cast<llvm::StructType>(getTypeInfo().getStorageType());
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}
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IsPOD_t isPOD(ResilienceExpansion expansion) const {
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return getTypeInfo().isPOD(expansion);
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}
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/// \group Query enum layout
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///
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/// These APIs assume a fixed layout; they will not work on generic
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/// enum types that have not been fully instantiated.
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/// Return the list of cases determined to have a payload.
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/// The payloads are discriminated using the bits in the mask returned by
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/// getTagBits().
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ArrayRef<Element> getElementsWithPayload() const {
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return ElementsWithPayload;
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}
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/// Return the list of cases determined to have no payload.
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/// Each no-payload case is represented by a specific bit pattern which can
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/// be queried using getBitPatternForNoPayloadElement.
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ArrayRef<Element> getElementsWithNoPayload() const {
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return ElementsWithNoPayload;
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}
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/// Return a tag index in the range [0..NumElements].
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unsigned getTagIndex(EnumElementDecl *Case) const;
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/// Return a tag index in the range
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/// [-ElementsWithPayload..ElementsWithNoPayload-1].
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int getResilientTagIndex(EnumElementDecl *Case) const;
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/// Map the given element to the appropriate index in the
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/// discriminator type.
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/// Returns -1 if this is not supported by the enum implementation.
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virtual int64_t getDiscriminatorIndex(EnumElementDecl *target) const {
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return -1;
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}
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/// Emit field names for enum reflection.
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virtual llvm::Constant *emitCaseNames() const;
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/// \brief Return the bits used for discriminators for payload cases.
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///
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/// These bits are populated in increasing value according to the order of
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/// the getElementsWithPayload() array, starting from zero for the first
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/// element with payload.
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virtual ClusteredBitVector getTagBitsForPayloads() const = 0;
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/// Return the bit pattern used for the given no-payload case.
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virtual ClusteredBitVector
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getBitPatternForNoPayloadElement(EnumElementDecl *theCase) const = 0;
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/// Return the bit mask used to test for no-payload cases.
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virtual ClusteredBitVector
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getBitMaskForNoPayloadElements() const = 0;
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/// \group Indirect enum operations
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/// Return the enum case tag for the given value. Payload cases come first,
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/// followed by non-payload cases. Used for the getEnumTag value witness.
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virtual llvm::Value *emitGetEnumTag(IRGenFunction &IGF,
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SILType T,
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Address enumAddr) const = 0;
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/// Project the address of the data for a case. Does not check or modify
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/// the referenced enum value.
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/// Corresponds to the SIL 'init_enum_data_addr' instruction.
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Address projectDataForStore(IRGenFunction &IGF,
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EnumElementDecl *elt,
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Address enumAddr) const;
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/// Overlay the tag value for a case onto a data value in memory.
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/// Corresponds to the SIL 'inject_enum_addr' instruction.
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virtual void storeTag(IRGenFunction &IGF,
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SILType T,
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Address enumAddr,
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EnumElementDecl *elt) const = 0;
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/// Overlay a dynamic case tag onto a data value in memory. Used when
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/// generating the destructiveInjectEnumTag value witness.
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virtual void emitStoreTag(IRGenFunction &IGF,
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SILType T,
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Address enumAddr,
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llvm::Value *tag) const = 0;
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/// Clears tag bits from within the payload of an enum in memory and
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/// projects the address of the data for a case. Does not check
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/// the referenced enum value.
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/// Performs the block argument binding for a SIL
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/// 'switch_enum_addr' instruction.
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/// Also used when generating the destructiveProjectEnumData value
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/// witness.
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Address destructiveProjectDataForLoad(IRGenFunction &IGF,
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SILType T,
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Address enumAddr,
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EnumElementDecl *Case) const;
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/// Clears tag bits from within the payload of an enum in memory and
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/// projects the address of the data for a case. Does not check
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/// the referenced enum value.
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virtual void destructiveProjectDataForLoad(IRGenFunction &IGF,
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SILType T,
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Address enumAddr) const = 0;
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/// Return an i1 value that indicates whether the specified indirect enum
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/// value holds the specified case. This is a light-weight form of a switch.
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virtual llvm::Value *emitIndirectCaseTest(IRGenFunction &IGF,
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SILType T,
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Address enumAddr,
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EnumElementDecl *Case) const = 0;
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/// Emit a branch on the case contained by an enum explosion.
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/// Performs the branching for a SIL 'switch_enum_addr'
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/// instruction.
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virtual void emitIndirectSwitch(IRGenFunction &IGF,
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SILType T,
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Address enumAddr,
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ArrayRef<std::pair<EnumElementDecl*,
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llvm::BasicBlock*>> dests,
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llvm::BasicBlock *defaultDest) const = 0;
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/// Emit code to extract the discriminator as an integer value.
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/// Returns null if this is not supported by the enum implementation.
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///
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/// FIXME: is this the same as emitGetEnumTag()? Seems like it could be,
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/// except that CCompatibleEnumImplStrategy maps cases to their raw
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/// values rather than indices.
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virtual llvm::Value *emitExtractDiscriminator(IRGenFunction &IGF,
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Explosion &value) const {
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return nullptr;
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}
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/// \group Loadable enum operations
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/// Emit the construction sequence for an enum case into an explosion.
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/// Corresponds to the SIL 'enum' instruction.
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virtual void emitValueInjection(IRGenFunction &IGF,
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EnumElementDecl *elt,
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Explosion ¶ms,
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Explosion &out) const = 0;
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/// Return an i1 value that indicates whether the specified loadable enum
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/// value holds the specified case. This is a light-weight form of a switch.
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virtual llvm::Value *emitValueCaseTest(IRGenFunction &IGF,
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Explosion &value,
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EnumElementDecl *Case) const = 0;
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/// Emit a branch on the case contained by an enum explosion.
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/// Performs the branching for a SIL 'switch_enum' instruction.
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virtual void emitValueSwitch(IRGenFunction &IGF,
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Explosion &value,
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ArrayRef<std::pair<EnumElementDecl*,
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llvm::BasicBlock*>> dests,
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llvm::BasicBlock *defaultDest) const = 0;
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/// Project a case value out of an enum explosion. This does not check that
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/// the explosion actually contains a value of the given case.
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/// Performs the block argument binding for a SIL 'switch_enum'
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/// instruction.
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virtual void emitValueProject(IRGenFunction &IGF,
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Explosion &inEnum,
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EnumElementDecl *theCase,
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Explosion &out) const = 0;
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/// \group Delegated TypeInfo operations
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virtual void getSchema(ExplosionSchema &schema) const = 0;
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virtual void destroy(IRGenFunction &IGF, Address addr, SILType T) const = 0;
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virtual void initializeFromParams(IRGenFunction &IGF, Explosion ¶ms,
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Address dest, SILType T) const;
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virtual void assignWithCopy(IRGenFunction &IGF, Address dest,
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Address src, SILType T) const = 0;
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virtual void assignWithTake(IRGenFunction &IGF, Address dest,
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Address src, SILType T) const = 0;
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virtual void initializeWithCopy(IRGenFunction &IGF, Address dest,
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Address src, SILType T) const = 0;
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virtual void initializeWithTake(IRGenFunction &IGF, Address dest,
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Address src, SILType T) const = 0;
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virtual void initializeMetadata(IRGenFunction &IGF,
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llvm::Value *metadata,
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llvm::Value *vwtable,
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SILType T) const = 0;
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virtual bool mayHaveExtraInhabitants(IRGenModule &IGM) const = 0;
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virtual llvm::Value *getExtraInhabitantIndex(IRGenFunction &IGF,
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Address src,
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SILType T) const = 0;
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virtual void storeExtraInhabitant(IRGenFunction &IGF,
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llvm::Value *index,
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Address dest,
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SILType T) const = 0;
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/// \group Delegated FixedTypeInfo operations
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virtual unsigned getFixedExtraInhabitantCount(IRGenModule &IGM) const = 0;
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virtual APInt
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getFixedExtraInhabitantValue(IRGenModule &IGM,
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unsigned bits,
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unsigned index) const = 0;
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virtual APInt
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getFixedExtraInhabitantMask(IRGenModule &IGM) const = 0;
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/// \group Delegated LoadableTypeInfo operations
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virtual unsigned getExplosionSize() const = 0;
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virtual void loadAsCopy(IRGenFunction &IGF, Address addr,
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Explosion &e) const = 0;
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virtual void loadAsTake(IRGenFunction &IGF, Address addr,
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Explosion &e) const = 0;
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virtual void assign(IRGenFunction &IGF, Explosion &e,
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Address addr) const = 0;
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virtual void initialize(IRGenFunction &IGF, Explosion &e,
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Address addr) const = 0;
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virtual void reexplode(IRGenFunction &IGF, Explosion &src,
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Explosion &dest) const = 0;
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virtual void copy(IRGenFunction &IGF, Explosion &src,
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Explosion &dest) const = 0;
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virtual void consume(IRGenFunction &IGF, Explosion &src) const = 0;
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virtual void fixLifetime(IRGenFunction &IGF, Explosion &src) const = 0;
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virtual void packIntoEnumPayload(IRGenFunction &IGF,
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EnumPayload &payload,
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Explosion &in,
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unsigned offset) const = 0;
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virtual void unpackFromEnumPayload(IRGenFunction &IGF,
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const EnumPayload &payload,
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Explosion &dest,
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unsigned offset) const = 0;
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virtual bool needsPayloadSizeInMetadata() const = 0;
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virtual unsigned getPayloadSizeForMetadata() const;
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virtual llvm::Value *loadRefcountedPtr(IRGenFunction &IGF, SourceLoc loc,
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Address addr) const;
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private:
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EnumImplStrategy(const EnumImplStrategy &) = delete;
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EnumImplStrategy &operator=(const EnumImplStrategy &) = delete;
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};
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/// Get the EnumImplStrategy for an enum type.
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const EnumImplStrategy &getEnumImplStrategy(IRGenModule &IGM, CanType ty);
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const EnumImplStrategy &getEnumImplStrategy(IRGenModule &IGM, SILType ty);
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}
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}
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#endif
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